gem5  v21.1.0.2
T_2_3_1.h
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3  Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
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21 
22  T_2_3_1.h --
23 
24  Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15
25 
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27 
28 /*****************************************************************************
29 
30  MODIFICATION LOG - modifiers, enter your name, affiliation, date and
31  changes you are making here.
32 
33  Name, Affiliation, Date:
34  Description of Modification:
35 
36  *****************************************************************************/
37 
38 SC_MODULE( MYNAME )
39 {
40  SC_HAS_PROCESS( MYNAME );
41 
42  sc_in_clk clk;
43 
44  const signal_vector& x;
45  const signal_vector& y;
46  signal_vector& z;
47 
48  MYNAME( sc_module_name NAME,
49  sc_clock& CLK,
50  const signal_vector& X,
51  const signal_vector& Y,
52  signal_vector& Z )
53  :
54  x(X), y(Y), z(Z)
55  {
56  clk(CLK);
57  SC_CTHREAD( entry, clk.pos() );
58  }
59  void entry();
60 };
SC_MODULE
SC_MODULE(MYNAME)
Definition: T_2_3_1.h:38
gem5::ArmISA::z
Bitfield< 11 > z
Definition: misc_types.hh:374
sc_core::sc_in_clk
sc_in< bool > sc_in_clk
Definition: sc_clock.hh:116
gem5::RiscvISA::x
Bitfield< 3 > x
Definition: pagetable.hh:73
SC_HAS_PROCESS
#define SC_HAS_PROCESS(name)
Definition: sc_module.hh:298
SC_CTHREAD
#define SC_CTHREAD(name, clk)
Definition: sc_module.hh:320
gem5::X86ISA::X
Bitfield< 15, 0 > X
Definition: int.hh:55

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