gem5  v22.1.0.0
add_chain_tb.h
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3  Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
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6  Accellera licenses this file to you under the Apache License, Version 2.0
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21 
22  add_chain_tb.h --
23 
24  Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15
25 
26  *****************************************************************************/
27 
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29 
30  MODIFICATION LOG - modifiers, enter your name, affiliation, date and
31  changes you are making here.
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33  Name, Affiliation, Date:
34  Description of Modification:
35 
36  *****************************************************************************/
37 
38 /******************************************************************************/
39 /*************************** Testbench Function **********************/
40 /******************************************************************************/
41 /* */
42 /* The testbench module has the following hierarchy: */
43 /* */
44 /* testbench */
45 /* - RESET_STIM */
46 /* - DATA_GEN */
47 /* */
48 /******************************************************************************/
49 
50 #include "common.h"
51 
52 struct testbench : public sc_module {
53  sc_signal<int> addr; // Address of input memory
54  sc_signal<bool> reset;
55  sc_signal<bool> ready;
58 
59  /*** Constructor ***/
60  testbench ( const sc_module_name& NAME,
61  sc_clock& TICK )
62 
63  : sc_module()
64  {
65  f_RESET_STIM ("RD1", TICK, ready, reset, addr);
66  f_DATA_GEN ("DG1", TICK, ready, data, addr);
67  f_add_chain ("AC1", TICK, reset, data, sum, ready);
68  f_DISPLAY ("D1", ready, data, sum);
69  }
70 };
void f_DISPLAY(const char *, const sc_signal< bool > &, const signal_bool_vector8 &, const signal_bool_vector4 &)
void f_RESET_STIM(const char *, sc_clock &, sc_signal< bool > &, sc_signal< bool > &, sc_signal< int > &)
void f_add_chain(const char *, sc_clock &, const sc_signal< bool > &, const signal_bool_vector8 &, signal_bool_vector4 &, sc_signal< bool > &)
void f_DATA_GEN(const char *, sc_clock &, const sc_signal< bool > &, signal_bool_vector8 &, sc_signal< int > &)
sc_signal< sc_bv< 8 > > signal_bool_vector8
Definition: common.h:43
Definition: tb.h:50
sc_signal< bool > reset
Definition: tb.h:52
signal_bool_vector8 data
Definition: tb.h:54
signal_bool_vector4 sum
Definition: tb.h:55
sc_signal< int > addr
Definition: tb.h:51
testbench(const sc_module_name &NAME, sc_clock &TICK)
Definition: add_chain_tb.h:60
sc_signal< bool > ready
Definition: tb.h:53
sc_signal< bool_vector4 > signal_bool_vector4
Definition: common.h:46

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