gem5 v24.0.0.0
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datatypes.h
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1/*****************************************************************************
2
3 Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
4 more contributor license agreements. See the NOTICE file distributed
5 with this work for additional information regarding copyright ownership.
6 Accellera licenses this file to you under the Apache License, Version 2.0
7 (the "License"); you may not use this file except in compliance with the
8 License. You may obtain a copy of the License at
9
10 http://www.apache.org/licenses/LICENSE-2.0
11
12 Unless required by applicable law or agreed to in writing, software
13 distributed under the License is distributed on an "AS IS" BASIS,
14 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
15 implied. See the License for the specific language governing
16 permissions and limitations under the License.
17
18 *****************************************************************************/
19
20/*****************************************************************************
21
22 datatypes.h --
23
24 Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30
25
26 *****************************************************************************/
27
28/*****************************************************************************
29
30 MODIFICATION LOG - modifiers, enter your name, affiliation, date and
31 changes you are making here.
32
33 Name, Affiliation, Date:
34 Description of Modification:
35
36 *****************************************************************************/
37
38
39#include "common.h"
40
41SC_MODULE( datatypes )
42{
43 SC_HAS_PROCESS( datatypes );
44
45 sc_in_clk clk;
46
47 //====================================================================
48 // [C] Always Needed Member Function
49 // -- constructor
50 // -- entry
51 //====================================================================
52
53 const sc_signal<bool>& reset ;
54 const sc_signal_bool_vector8& in_value1; // Input port
55 const sc_signal_bool_vector8& in_value2; // Input port
56 const sc_signal<long>& in_value3; // Input port
57 const sc_signal<int>& in_value4; // Input port
58 const sc_signal<short>& in_value5; // Input port
59 const sc_signal<char>& in_value6; // Input port
60 const sc_signal<char>& in_value7; // Input port
61 const sc_signal<bool>& in_value8 ;
62 const sc_signal_bool_vector4& in_value9 ; // Input port
63 const sc_signal_logic_vector4& in_value10; // Input port
64 const sc_signal<bool>& in_valid; // Input port
65 sc_signal<bool>& out_ack; // Output port
66 sc_signal_bool_vector8& out_value1; // Output port
67 sc_signal_bool_vector8& out_value2; // Output port
68 sc_signal<long>& out_value3; // Output port
69 sc_signal<int>& out_value4; // Output port
70 sc_signal<short>& out_value5; // Output port
71 sc_signal<char>& out_value6; // Output port
72 sc_signal<bool>& out_value7; // Output port
73 sc_signal_bool_vector4& out_value8; // Output port
74 sc_signal_logic_vector4& out_value9; // Output port
75 sc_signal<bool>& out_valid; // Output port
76
77
78 //
79 // Constructor
80 //
81
82 datatypes(
83 sc_module_name NAME, // referense name
84 sc_clock& CLK, // clock
85 const sc_signal<bool>& RESET,
86 const sc_signal_bool_vector8& IN_VALUE1,
87 const sc_signal_bool_vector8& IN_VALUE2,
88 const sc_signal<long>& IN_VALUE3,
89 const sc_signal<int>& IN_VALUE4,
90 const sc_signal<short>& IN_VALUE5,
91 const sc_signal<char>& IN_VALUE6,
92 const sc_signal<char>& IN_VALUE7,
93 const sc_signal<bool>& IN_VALUE8,
94 const sc_signal_bool_vector4& IN_VALUE9,
95 const sc_signal_logic_vector4& IN_VALUE10,
96 const sc_signal<bool>& IN_VALID,
97
98 sc_signal<bool>& OUT_ACK,
99 sc_signal_bool_vector8& OUT_VALUE1,
100 sc_signal_bool_vector8& OUT_VALUE2,
101 sc_signal<long>& OUT_VALUE3,
102 sc_signal<int>& OUT_VALUE4,
103 sc_signal<short>& OUT_VALUE5,
104 sc_signal<char>& OUT_VALUE6,
105 sc_signal<bool>& OUT_VALUE7,
106 sc_signal_bool_vector4& OUT_VALUE8,
107 sc_signal_logic_vector4& OUT_VALUE9,
108 sc_signal<bool>& OUT_VALID
109 )
110 :
111 reset (RESET),
112 in_value1 (IN_VALUE1),
113 in_value2 (IN_VALUE2),
114 in_value3 (IN_VALUE3),
115 in_value4 (IN_VALUE4),
116 in_value5 (IN_VALUE5),
117 in_value6 (IN_VALUE6),
118 in_value7 (IN_VALUE7),
119 in_value8 (IN_VALUE8),
120 in_value9 (IN_VALUE9),
121 in_value10 (IN_VALUE10),
122 in_valid (IN_VALID),
123 out_ack (OUT_ACK),
124 out_value1 (OUT_VALUE1),
125 out_value2 (OUT_VALUE2),
126 out_value3 (OUT_VALUE3),
127 out_value4 (OUT_VALUE4),
128 out_value5 (OUT_VALUE5),
129 out_value6 (OUT_VALUE6),
130 out_value7 (OUT_VALUE7),
131 out_value8 (OUT_VALUE8),
132 out_value9 (OUT_VALUE9),
133 out_valid (OUT_VALID)
134
135 {
136 clk (CLK);
137 SC_CTHREAD( entry, clk.pos() );
138 reset_signal_is(reset,true);
139 };
140
141//Process Functionality: Described in the member function below
142 void entry();
143};
144
145// EOF
146
sc_signal< sc_bv< 4 > > sc_signal_bool_vector4
Definition common.h:43
sc_signal< sc_bv< 8 > > sc_signal_bool_vector8
Definition common.h:44
sc_signal< sc_lv< 4 > > sc_signal_logic_vector4
Definition common.h:45
#define SC_CTHREAD(name, clk)
Definition sc_module.hh:323
#define SC_MODULE(name)
Definition sc_module.hh:295
#define SC_HAS_PROCESS(name)
Definition sc_module.hh:301

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