46 sc_signal<bool>&
reset;
53 sc_signal<bool>& out_valid;
55 stimulus(sc_module_name NAME,
57 sc_signal<bool>& RESET,
64 sc_signal<bool>& OUT_VALID
68 out_stimulus1(OUT_STIMULUS1),
69 out_stimulus2(OUT_STIMULUS2),
70 out_stimulus3(OUT_STIMULUS3),
71 out_stimulus4(OUT_STIMULUS4),
72 out_stimulus5(OUT_STIMULUS5),
73 out_stimulus6(OUT_STIMULUS6),
sc_signal< sc_bv< 4 > > sc_signal_bool_vector4
sc_signal< sc_bv< 8 > > sc_signal_bool_vector8
sc_signal< sc_bv< 6 > > sc_signal_bool_vector6
#define SC_CTHREAD(name, clk)
#define SC_HAS_PROCESS(name)