gem5 v24.0.0.0
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accessor.h
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1/*****************************************************************************
2
3 Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
4 more contributor license agreements. See the NOTICE file distributed
5 with this work for additional information regarding copyright ownership.
6 Accellera licenses this file to you under the Apache License, Version 2.0
7 (the "License"); you may not use this file except in compliance with the
8 License. You may obtain a copy of the License at
9
10 http://www.apache.org/licenses/LICENSE-2.0
11
12 Unless required by applicable law or agreed to in writing, software
13 distributed under the License is distributed on an "AS IS" BASIS,
14 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
15 implied. See the License for the specific language governing
16 permissions and limitations under the License.
17
18 *****************************************************************************/
19
20/*****************************************************************************
21
22 accessor.h --
23
24 Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15
25
26 *****************************************************************************/
27
28/*****************************************************************************
29
30 MODIFICATION LOG - modifiers, enter your name, affiliation, date and
31 changes you are making here.
32
33 Name, Affiliation, Date:
34 Description of Modification:
35
36 *****************************************************************************/
37
38/* Filename accessor.h */
39/* This is the interface file for synchronous process 'accessor' */
40
41#include "common.h"
42
43SC_MODULE( accessor )
44{
45 SC_HAS_PROCESS( accessor );
46
47 sc_in_clk clk;
48
49 const signal_bool_vector32& datain; //input
50 sc_signal<bool>& chip_select; //output
51 sc_signal<bool>& write_enable; //output
52 signal_bool_vector10& address; //output
53 signal_bool_vector32& dataout; //output
54
55 // Parameter
56 const int memory_latency;
57
58 //Constructor
59 accessor(sc_module_name NAME,
60 sc_clock& CLK,
61 const signal_bool_vector32& DATAIN,
62 sc_signal<bool>& CHIP_SELECT,
63 sc_signal<bool>& WRITE_ENABLE,
64 signal_bool_vector10& ADDRESS,
65 signal_bool_vector32& DATAOUT,
66 const int MEMORY_LATENCY = 1)
67 : datain(DATAIN), chip_select(CHIP_SELECT),
68 write_enable(WRITE_ENABLE), address(ADDRESS), dataout(DATAOUT),
69 memory_latency(MEMORY_LATENCY)
70 {
71 clk(CLK);
72 SC_CTHREAD( entry, clk.pos() );
73 }
74
75 // Process functionality in member function below
76 void entry();
77};
78
79
#define SC_CTHREAD(name, clk)
Definition sc_module.hh:323
#define SC_MODULE(name)
Definition sc_module.hh:295
#define SC_HAS_PROCESS(name)
Definition sc_module.hh:301
sc_signal< sc_bv< 32 > > signal_bool_vector32
Definition common.h:44
sc_signal< sc_bv< 10 > > signal_bool_vector10
Definition common.h:43

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