#include <exetrace.hh>

Inheritance diagram for gem5::Trace::ExeTracerRecord:

Public Member Functions
	ExeTracerRecord (Tick _when, ThreadContext *_thread, const StaticInstPtr _staticInst, const PCStateBase &_pc, const StaticInstPtr _macroStaticInst=NULL)

void	traceInst (const StaticInstPtr &inst, bool ran)

void	dump ()

Public Member Functions inherited from gem5::Trace::InstRecord
	InstRecord (Tick _when, ThreadContext *_thread, const StaticInstPtr _staticInst, const PCStateBase &_pc, const StaticInstPtr _macroStaticInst=nullptr)

virtual	~InstRecord ()

void	setWhen (Tick new_when)

void	setMem (Addr a, Addr s, unsigned f)

template<typename T , size_t N>
void	setData (std::array< T, N > d)

void	setData (uint64_t d)

void	setData (uint32_t d)

void	setData (uint16_t d)

void	setData (uint8_t d)

void	setData (int64_t d)

void	setData (int32_t d)

void	setData (int16_t d)

void	setData (int8_t d)

void	setData (double d)

void	setData (TheISA::VecRegContainer &d)

void	setData (TheISA::VecPredRegContainer &d)

void	setFetchSeq (InstSeqNum seq)

void	setCPSeq (InstSeqNum seq)

void	setPredicate (bool val)

void	setFaulting (bool val)

Tick	getWhen () const

ThreadContext *	getThread () const

StaticInstPtr	getStaticInst () const

const PCStateBase &	getPCState () const

StaticInstPtr	getMacroStaticInst () const

Addr	getAddr () const

Addr	getSize () const

unsigned	getFlags () const

bool	getMemValid () const

uint64_t	getIntData () const

double	getFloatData () const

int	getDataStatus () const

InstSeqNum	getFetchSeq () const

bool	getFetchSeqValid () const

InstSeqNum	getCpSeq () const

bool	getCpSeqValid () const

bool	getFaulting () const

Additional Inherited Members
Protected Types inherited from gem5::Trace::InstRecord
enum	DataStatus { DataInvalid = 0, DataInt8 = 1, DataInt16 = 2, DataInt32 = 4, DataInt64 = 8, DataDouble = 3, DataVec = 5, DataVecPred = 6 }

Protected Attributes inherited from gem5::Trace::InstRecord
Tick	when

ThreadContext *	thread

StaticInstPtr	staticInst

std::unique_ptr< PCStateBase >	pc

StaticInstPtr	macroStaticInst

Addr	addr = 0
	The address that was accessed. More...

Addr	size = 0
	The size of the memory request. More...

unsigned	flags = 0
	The flags that were assigned to the request. More...

union {
uint64_t as_int

double as_double

TheISA::VecRegContainer * as_vec

TheISA::VecPredRegContainer * as_pred

}	data = {0}

InstSeqNum	fetch_seq = 0

InstSeqNum	cp_seq = 0

enum gem5::Trace::InstRecord::DataStatus	data_status = DataInvalid

bool	mem_valid = false

bool	fetch_seq_valid = false

bool	cp_seq_valid = false

bool	predicate = true
	is the predicate for execution this inst true or false (not execed)? More...

bool	faulting = false
	Did the execution of this instruction fault? (requires ExecFaulting to be enabled) More...

Detailed Description

Definition at line 47 of file exetrace.hh.

Constructor & Destructor Documentation

gem5::Trace::ExeTracerRecord::ExeTracerRecord	(	Tick	_when,
		ThreadContext *	_thread,
		const StaticInstPtr	_staticInst,
		const PCStateBase &	_pc,
		const StaticInstPtr	_macroStaticInst = `NULL`
	)