#include <tarmac_base.hh>

Inheritance diagram for gem5::Trace::TarmacBaseRecord:

Classes
struct	InstEntry
	TARMAC instruction trace record. More...

struct	MemEntry
	TARMAC memory access trace record (stores only). More...

struct	RegEntry
	TARMAC register trace record. More...

Public Types
enum	TarmacRecordType { TARMAC_INST, TARMAC_REG, TARMAC_MEM, TARMAC_UNSUPPORTED }
	TARMAC trace record type. More...

enum	ISetState { ISET_ARM, ISET_THUMB, ISET_A64, ISET_UNSUPPORTED }
	ARM instruction set state. More...

enum	RegType { REG_R, REG_X, REG_S, REG_D, REG_P, REG_Q, REG_Z, REG_MISC }
	ARM register type. More...

Public Member Functions
	TarmacBaseRecord (Tick _when, ThreadContext *_thread, const StaticInstPtr _staticInst, const PCStateBase &_pc, const StaticInstPtr _macroStaticInst=nullptr)

virtual void	dump ()=0

Public Member Functions inherited from gem5::Trace::InstRecord
	InstRecord (Tick _when, ThreadContext *_thread, const StaticInstPtr _staticInst, const PCStateBase &_pc, const StaticInstPtr _macroStaticInst=nullptr)

virtual	~InstRecord ()

void	setWhen (Tick new_when)

void	setMem (Addr a, Addr s, unsigned f)

template<typename T , size_t N>
void	setData (std::array< T, N > d)

void	setData (uint64_t d)

void	setData (uint32_t d)

void	setData (uint16_t d)

void	setData (uint8_t d)

void	setData (int64_t d)

void	setData (int32_t d)

void	setData (int16_t d)

void	setData (int8_t d)

void	setData (double d)

void	setData (TheISA::VecRegContainer &d)

void	setData (TheISA::VecPredRegContainer &d)

void	setFetchSeq (InstSeqNum seq)

void	setCPSeq (InstSeqNum seq)

void	setPredicate (bool val)

void	setFaulting (bool val)

Tick	getWhen () const

ThreadContext *	getThread () const

StaticInstPtr	getStaticInst () const

const PCStateBase &	getPCState () const

StaticInstPtr	getMacroStaticInst () const

Addr	getAddr () const

Addr	getSize () const

unsigned	getFlags () const

bool	getMemValid () const

uint64_t	getIntData () const

double	getFloatData () const

int	getDataStatus () const

InstSeqNum	getFetchSeq () const

bool	getFetchSeqValid () const

InstSeqNum	getCpSeq () const

bool	getCpSeqValid () const

bool	getFaulting () const

Static Public Member Functions
static ISetState	pcToISetState (const PCStateBase &pc)
	Returns the Instruction Set State according to the current PCState. More...

Additional Inherited Members
Protected Types inherited from gem5::Trace::InstRecord
enum	DataStatus { DataInvalid = 0, DataInt8 = 1, DataInt16 = 2, DataInt32 = 4, DataInt64 = 8, DataDouble = 3, DataVec = 5, DataVecPred = 6 }

Protected Attributes inherited from gem5::Trace::InstRecord
Tick	when

ThreadContext *	thread

StaticInstPtr	staticInst

std::unique_ptr< PCStateBase >	pc

StaticInstPtr	macroStaticInst

Addr	addr = 0
	The address that was accessed. More...

Addr	size = 0
	The size of the memory request. More...

unsigned	flags = 0
	The flags that were assigned to the request. More...

union {
uint64_t as_int

double as_double

TheISA::VecRegContainer * as_vec

TheISA::VecPredRegContainer * as_pred

}	data = {0}

InstSeqNum	fetch_seq = 0

InstSeqNum	cp_seq = 0

enum gem5::Trace::InstRecord::DataStatus	data_status = DataInvalid

bool	mem_valid = false

bool	fetch_seq_valid = false

bool	cp_seq_valid = false

bool	predicate = true
	is the predicate for execution this inst true or false (not execed)? More...

bool	faulting = false
	Did the execution of this instruction fault? (requires ExecFaulting to be enabled) More...

Detailed Description

Definition at line 64 of file tarmac_base.hh.

Member Enumeration Documentation

◆ ISetState

enum gem5::Trace::TarmacBaseRecord::ISetState

ARM instruction set state.

Enumerator
ISET_ARM
ISET_THUMB
ISET_A64
ISET_UNSUPPORTED

Definition at line 77 of file tarmac_base.hh.

◆ RegType

enum gem5::Trace::TarmacBaseRecord::RegType

ARM register type.

Enumerator
REG_R
REG_X
REG_S
REG_D
REG_P
REG_Q
REG_Z
REG_MISC

Definition at line 81 of file tarmac_base.hh.

◆ TarmacRecordType

enum gem5::Trace::TarmacBaseRecord::TarmacRecordType

TARMAC trace record type.

Enumerator
TARMAC_INST
TARMAC_REG
TARMAC_MEM
TARMAC_UNSUPPORTED

Definition at line 68 of file tarmac_base.hh.

Constructor & Destructor Documentation

◆ TarmacBaseRecord()

gem5::Trace::TarmacBaseRecord::TarmacBaseRecord	(	Tick	_when,
		ThreadContext *	_thread,
		const StaticInstPtr	_staticInst,
		const PCStateBase &	_pc,
		const StaticInstPtr	_macroStaticInst = `nullptr`
	)

Definition at line 55 of file tarmac_base.cc.

Member Function Documentation

◆ dump()

virtual void gem5::Trace::TarmacBaseRecord::dump ( )

pure virtual

Implements gem5::Trace::InstRecord.

Implemented in gem5::Trace::TarmacTracerRecord, and gem5::Trace::TarmacParserRecord.

◆ pcToISetState()

TarmacBaseRecord::ISetState gem5::Trace::TarmacBaseRecord::pcToISetState ( const PCStateBase & pc )

static

Returns the Instruction Set State according to the current PCState.

Parameters

pc	program counter (PCState) variable

Returns: Instruction Set State for the given PCState

Definition at line 103 of file tarmac_base.cc.

References ISET_A64, ISET_ARM, ISET_THUMB, ISET_UNSUPPORTED, and gem5::Trace::InstRecord::pc.

Referenced by gem5::Trace::TarmacParserRecord::dump().

The documentation for this class was generated from the following files:

arch/arm/tracers/tarmac_base.hh
arch/arm/tracers/tarmac_base.cc

Classes

Public Types

Public Member Functions

Static Public Member Functions

Additional Inherited Members