gem5  v21.1.0.2
smmu_v3_ptops.cc
Go to the documentation of this file.
1 /*
2  * Copyright (c) 2013, 2018-2019 ARM Limited
3  * All rights reserved
4  *
5  * The license below extends only to copyright in the software and shall
6  * not be construed as granting a license to any other intellectual
7  * property including but not limited to intellectual property relating
8  * to a hardware implementation of the functionality of the software
9  * licensed hereunder. You may use the software subject to the license
10  * terms below provided that you ensure that this notice is replicated
11  * unmodified and in its entirety in all distributions of the software,
12  * modified or unmodified, in source code or in binary form.
13  *
14  * Redistribution and use in source and binary forms, with or without
15  * modification, are permitted provided that the following conditions are
16  * met: redistributions of source code must retain the above copyright
17  * notice, this list of conditions and the following disclaimer;
18  * redistributions in binary form must reproduce the above copyright
19  * notice, this list of conditions and the following disclaimer in the
20  * documentation and/or other materials provided with the distribution;
21  * neither the name of the copyright holders nor the names of its
22  * contributors may be used to endorse or promote products derived from
23  * this software without specific prior written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36  */
37 
38 #include "dev/arm/smmu_v3_ptops.hh"
39 
40 #include "base/bitfield.hh"
41 #include "base/logging.hh"
42 
43 namespace gem5
44 {
45 
46 bool
47 V7LPageTableOps::isValid(pte_t pte, unsigned level) const
48 {
49  switch (level) {
50  case 1: return pte & 0x1;
51  case 2: return pte & 0x1;
52  case 3: return (pte & 0x1) && (pte & 0x2);
53  default: panic("bad level %d", level);
54  }
55 }
56 
57 bool
58 V7LPageTableOps::isLeaf(pte_t pte, unsigned level) const
59 {
60  switch (level) {
61  case 1: return !(pte & 0x2);
62  case 2: return !(pte & 0x2);
63  case 3: return true;
64  default: panic("bad level %d", level);
65  }
66 }
67 
68 bool
69 V7LPageTableOps::isWritable(pte_t pte, unsigned level, bool stage2) const
70 {
71  return stage2 ? bits(pte, 7, 6)==3 : bits(pte, 7)==0;
72 }
73 
74 Addr
76 {
77  if (isLeaf(pte, level)) {
78  switch (level) {
79  case 1: return mbits(pte, 39, 30);
80  case 2: return mbits(pte, 39, 21);
81  case 3: return mbits(pte, 39, 12);
82  default: panic("bad level %d", level);
83  }
84  } else {
85  return mbits(pte, 39, 12);
86  }
87 }
88 
89 Addr
91 {
92  // In theory this should be configurable...
93  const int n = 12;
94 
95  switch (level) {
96  case 1: return bits(va, 26+n, 30) << 3; break;
97  case 2: return bits(va, 29, 21) << 3; break;
98  case 3: return bits(va, 20, 12) << 3; break;
99  default: panic("bad level %d", level);
100  }
101 }
102 
103 Addr
105 {
106  switch (level) {
107  case 1: return ~mask(30);
108  case 2: return ~mask(21);
109  case 3: return bits(pte, 52) ? ~mask(16) : ~mask(12);
110  default: panic("bad level %d", level);
111  }
112 }
113 
114 Addr
116 {
117  switch (level) {
118  case 1: return ~mask(30);
119  case 2: return ~mask(21);
120  case 3: return ~mask(12);
121  default: panic("bad level %d", level);
122  }
123 }
124 
125 unsigned
126 V7LPageTableOps::firstLevel(uint8_t tsz) const
127 {
128  return 1;
129 }
130 
131 unsigned
133 {
134  return 3;
135 }
136 
137 bool
139 {
140  switch (level) {
141  case 0: return pte & 0x1;
142  case 1: return pte & 0x1;
143  case 2: return pte & 0x1;
144  case 3: return (pte & 0x1) && (pte & 0x2);
145  default: panic("bad level %d", level);
146  }
147 }
148 
149 bool
151 {
152  switch (level) {
153  case 0: return false;
154  case 1: return !(pte & 0x2);
155  case 2: return !(pte & 0x2);
156  case 3: return true;
157  default: panic("bad level %d", level);
158  }
159 }
160 
161 bool
162 V8PageTableOps4k::isWritable(pte_t pte, unsigned level, bool stage2) const
163 {
164  return stage2 ? bits(pte, 7, 6)==3 : bits(pte, 7)==0;
165 }
166 
167 Addr
169 {
170  if (isLeaf(pte, level)) {
171  switch (level) {
172  // no level 0 here
173  case 1: return mbits(pte, 47, 30);
174  case 2: return mbits(pte, 47, 21);
175  case 3: return mbits(pte, 47, 12);
176  default: panic("bad level %d", level);
177  }
178  } else {
179  return mbits(pte, 47, 12);
180  }
181 }
182 
183 Addr
185 {
186  switch (level) {
187  case 0: return bits(va, 47, 39) << 3; break;
188  case 1: return bits(va, 38, 30) << 3; break;
189  case 2: return bits(va, 29, 21) << 3; break;
190  case 3: return bits(va, 20, 12) << 3; break;
191  default: panic("bad level %d", level);
192  }
193 }
194 
195 Addr
197 {
198  switch (level) {
199  // no level 0 here
200  case 1: return ~mask(30);
201  case 2: return ~mask(21);
202  case 3: return bits(pte, 52) ? ~mask(16) : ~mask(12);
203  default: panic("bad level %d", level);
204  }
205 }
206 
207 Addr
209 {
210  switch (level) {
211  case 0: return ~mask(39);
212  case 1: return ~mask(30);
213  case 2: return ~mask(21);
214  case 3: return ~mask(12);
215  default: panic("bad level %d", level);
216  }
217 }
218 
219 unsigned
221 {
222  if (tsz >= 16 && tsz <= 24) return 0;
223  if (tsz >= 25 && tsz <= 33) return 1;
224  if (tsz >= 34 && tsz <= 39) return 2;
225 
226  panic("Unsupported TnSZ: %d\n", tsz);
227 }
228 
229 unsigned
231 {
232  return 3;
233 }
234 
235 bool
237 {
238  switch (level) {
239  case 0: return pte & 0x1;
240  case 1: return pte & 0x1;
241  case 2: return pte & 0x1;
242  case 3: return (pte & 0x1) && (pte & 0x2);
243  default: panic("bad level %d", level);
244  }
245 }
246 
247 bool
249 {
250  switch (level) {
251  case 0: return false;
252  case 1: return false;
253  case 2: return !(pte & 0x2);
254  case 3: return true;
255  default: panic("bad level %d", level);
256  }
257 }
258 
259 bool
260 V8PageTableOps16k::isWritable(pte_t pte, unsigned level, bool stage2) const
261 {
262  return stage2 ? bits(pte, 7, 6) == 3 : bits(pte, 7) == 0;
263 }
264 
265 Addr
267 {
268  if (isLeaf(pte, level)) {
269  switch (level) {
270  // no level 0 here
271  case 1: return mbits(pte, 47, 36);
272  case 2: return mbits(pte, 47, 25);
273  case 3: return mbits(pte, 47, 14);
274  default: panic("bad level %d", level);
275  }
276  } else {
277  return mbits(pte, 47, 14);
278  }
279 }
280 
281 Addr
283 {
284  switch (level) {
285  case 0: return bits(va, 47, 47) << 3; break;
286  case 1: return bits(va, 46, 36) << 3; break;
287  case 2: return bits(va, 35, 25) << 3; break;
288  case 3: return bits(va, 24, 14) << 3; break;
289  default: panic("bad level %d", level);
290  }
291 }
292 
293 Addr
295 {
296  switch (level) {
297  // no level 0 here
298  case 1: return ~mask(36);
299  // 16K granule supports contiguous entries also at L2; - 1G
300  case 2: return bits(pte, 52) ? ~mask(30) : ~mask(25);
301  // as well as at L3; - 2M
302  case 3: return bits(pte, 52) ? ~mask(21) : ~mask(14);
303  default: panic("bad level %d", level);
304  }
305 }
306 
307 Addr
309 {
310  switch (level) {
311  case 0: return ~mask(47);
312  case 1: return ~mask(36);
313  case 2: return ~mask(25);
314  case 3: return ~mask(14);
315  default: panic("bad level %d", level);
316  }
317 }
318 
319 unsigned
321 {
322  if (tsz == 16) return 0;
323  if (tsz >= 17 && tsz <= 27) return 1;
324  if (tsz >= 28 && tsz <= 38) return 2;
325  if (tsz == 39) return 3;
326 
327  panic("Unsupported TnSZ: %d\n", tsz);
328 }
329 
330 unsigned
332 {
333  return 3;
334 }
335 
336 bool
338 {
339  switch (level) {
340  case 1: return pte & 0x1;
341  case 2: return pte & 0x1;
342  case 3: return (pte & 0x1) && (pte & 0x2);
343  default: panic("bad level %d", level);
344  }
345 }
346 
347 bool
349 {
350  switch (level) {
351  case 1: return false;
352  case 2: return !(pte & 0x2);
353  case 3: return true;
354  default: panic("bad level %d", level);
355  }
356 }
357 
358 bool
359 V8PageTableOps64k::isWritable(pte_t pte, unsigned level, bool stage2) const
360 {
361  return stage2 ? bits(pte, 7, 6)==3 : bits(pte, 7)==0;
362 }
363 
364 Addr
366 {
367  if (isLeaf(pte, level)) {
368  switch (level) {
369  // no level 1 here
370  case 2: return mbits(pte, 47, 29);
371  case 3: return mbits(pte, 47, 16);
372  default: panic("bad level %d", level);
373  }
374  } else {
375  return mbits(pte, 47, 16);
376  }
377 }
378 
379 Addr
381 {
382  switch (level) {
383  case 1: return bits(va, 47, 42) << 3; break;
384  case 2: return bits(va, 41, 29) << 3; break;
385  case 3: return bits(va, 28, 16) << 3; break;
386  default: panic("bad level %d", level);
387  }
388 }
389 
390 Addr
392 {
393  switch (level) {
394  // no level 1 here
395  case 2: return ~mask(29);
396  case 3: return bits(pte, 52) ? ~mask(21) : ~mask(16);
397  default: panic("bad level %d", level);
398  }
399 }
400 
401 Addr
403 {
404  switch (level) {
405  case 1: return ~mask(42);
406  case 2: return ~mask(29);
407  case 3: return ~mask(16);
408  default: panic("bad level %d", level);
409  }
410 }
411 
412 unsigned
414 {
415  if (tsz >= 12 && tsz <= 21) return 1;
416  if (tsz >= 22 && tsz <= 34) return 2;
417  if (tsz >= 35 && tsz <= 39) return 3;
418 
419  panic("Unsupported TnSZ: %d\n", tsz);
420 }
421 
422 unsigned
424 {
425  return 3;
426 }
427 
428 } // namespace gem5
gem5::X86ISA::level
Bitfield< 20 > level
Definition: intmessage.hh:51
gem5::V8PageTableOps16k::lastLevel
unsigned lastLevel() const override
Definition: smmu_v3_ptops.cc:331
gem5::V8PageTableOps64k::isLeaf
bool isLeaf(pte_t pte, unsigned level) const override
Definition: smmu_v3_ptops.cc:348
gem5::V8PageTableOps16k::isLeaf
bool isLeaf(pte_t pte, unsigned level) const override
Definition: smmu_v3_ptops.cc:248
gem5::V7LPageTableOps::pageMask
Addr pageMask(pte_t pte, unsigned level) const override
Definition: smmu_v3_ptops.cc:104
gem5::V8PageTableOps4k::isLeaf
bool isLeaf(pte_t pte, unsigned level) const override
Definition: smmu_v3_ptops.cc:150
gem5::V8PageTableOps64k::isWritable
bool isWritable(pte_t pte, unsigned level, bool stage2) const override
Definition: smmu_v3_ptops.cc:359
gem5::V8PageTableOps4k::isWritable
bool isWritable(pte_t pte, unsigned level, bool stage2) const override
Definition: smmu_v3_ptops.cc:162
gem5::V8PageTableOps4k::pageMask
Addr pageMask(pte_t pte, unsigned level) const override
Definition: smmu_v3_ptops.cc:196
gem5::V7LPageTableOps::isWritable
bool isWritable(pte_t pte, unsigned level, bool stage2) const override
Definition: smmu_v3_ptops.cc:69
gem5::V8PageTableOps16k::index
Addr index(Addr va, unsigned level) const override
Definition: smmu_v3_ptops.cc:282
gem5::V7LPageTableOps::lastLevel
unsigned lastLevel() const override
Definition: smmu_v3_ptops.cc:132
gem5::PageTableOps::pte_t
int64_t pte_t
Definition: smmu_v3_ptops.hh:50
gem5::mbits
constexpr T mbits(T val, unsigned first, unsigned last)
Mask off the given bits in place like bits() but without shifting.
Definition: bitfield.hh:103
gem5::V8PageTableOps16k::pageMask
Addr pageMask(pte_t pte, unsigned level) const override
Definition: smmu_v3_ptops.cc:294
gem5::mask
constexpr uint64_t mask(unsigned nbits)
Generate a 64-bit mask of 'nbits' 1s, right justified.
Definition: bitfield.hh:63
gem5::V8PageTableOps16k::nextLevelPointer
Addr nextLevelPointer(pte_t pte, unsigned level) const override
Definition: smmu_v3_ptops.cc:266
gem5::V7LPageTableOps::walkMask
Addr walkMask(unsigned level) const override
Definition: smmu_v3_ptops.cc:115
gem5::V8PageTableOps64k::firstLevel
unsigned firstLevel(uint8_t tsz) const override
Definition: smmu_v3_ptops.cc:413
gem5::V8PageTableOps4k::walkMask
Addr walkMask(unsigned level) const override
Definition: smmu_v3_ptops.cc:208
gem5::V7LPageTableOps::nextLevelPointer
Addr nextLevelPointer(pte_t pte, unsigned level) const override
Definition: smmu_v3_ptops.cc:75
bitfield.hh
gem5::V8PageTableOps4k::isValid
bool isValid(pte_t pte, unsigned level) const override
Definition: smmu_v3_ptops.cc:138
gem5::V8PageTableOps16k::firstLevel
unsigned firstLevel(uint8_t tsz) const override
Definition: smmu_v3_ptops.cc:320
gem5::V8PageTableOps64k::isValid
bool isValid(pte_t pte, unsigned level) const override
Definition: smmu_v3_ptops.cc:337
smmu_v3_ptops.hh
gem5::V8PageTableOps64k::pageMask
Addr pageMask(pte_t pte, unsigned level) const override
Definition: smmu_v3_ptops.cc:391
gem5::V8PageTableOps16k::isValid
bool isValid(pte_t pte, unsigned level) const override
Definition: smmu_v3_ptops.cc:236
gem5::bits
constexpr T bits(T val, unsigned first, unsigned last)
Extract the bitfield from position 'first' to 'last' (inclusive) from 'val' and right justify it.
Definition: bitfield.hh:76
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
gem5::V7LPageTableOps::isLeaf
bool isLeaf(pte_t pte, unsigned level) const override
Definition: smmu_v3_ptops.cc:58
gem5::V8PageTableOps4k::firstLevel
unsigned firstLevel(uint8_t tsz) const override
Definition: smmu_v3_ptops.cc:220
gem5::ArmISA::va
Bitfield< 8 > va
Definition: misc_types.hh:275
gem5::V7LPageTableOps::firstLevel
unsigned firstLevel(uint8_t tsz) const override
Definition: smmu_v3_ptops.cc:126
gem5::V8PageTableOps4k::index
Addr index(Addr va, unsigned level) const override
Definition: smmu_v3_ptops.cc:184
gem5::ArmISA::n
Bitfield< 31 > n
Definition: misc_types.hh:455
logging.hh
gem5::V8PageTableOps4k::nextLevelPointer
Addr nextLevelPointer(pte_t pte, unsigned level) const override
Definition: smmu_v3_ptops.cc:168
gem5::V8PageTableOps64k::index
Addr index(Addr va, unsigned level) const override
Definition: smmu_v3_ptops.cc:380
gem5::V8PageTableOps64k::lastLevel
unsigned lastLevel() const override
Definition: smmu_v3_ptops.cc:423
gem5::V8PageTableOps16k::isWritable
bool isWritable(pte_t pte, unsigned level, bool stage2) const override
Definition: smmu_v3_ptops.cc:260
gem5::V8PageTableOps16k::walkMask
Addr walkMask(unsigned level) const override
Definition: smmu_v3_ptops.cc:308
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gem5::V8PageTableOps64k::nextLevelPointer
Addr nextLevelPointer(pte_t pte, unsigned level) const override
Definition: smmu_v3_ptops.cc:365
gem5::V8PageTableOps4k::lastLevel
unsigned lastLevel() const override
Definition: smmu_v3_ptops.cc:230
gem5::V7LPageTableOps::index
Addr index(Addr va, unsigned level) const override
Definition: smmu_v3_ptops.cc:90
gem5::V7LPageTableOps::isValid
bool isValid(pte_t pte, unsigned level) const override
Definition: smmu_v3_ptops.cc:47
gem5::V8PageTableOps64k::walkMask
Addr walkMask(unsigned level) const override
Definition: smmu_v3_ptops.cc:402
panic
#define panic(...)
This implements a cprintf based panic() function.
Definition: logging.hh:177

Generated on Tue Sep 21 2021 12:25:15 for gem5 by doxygen 1.8.17