gem5
v22.0.0.2
arch
sparc
vecregs.hh
Go to the documentation of this file.
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/*
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* Copyright (c) 2003-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __ARCH_SPARC_VECREGS_HH__
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#define __ARCH_SPARC_VECREGS_HH__
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#include "
arch/generic/vec_pred_reg.hh
"
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#include "
arch/generic/vec_reg.hh
"
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namespace
gem5
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{
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namespace
SparcISA
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{
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// Not applicable to SPARC
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using
VecRegContainer
=
::gem5::DummyVecRegContainer
;
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using
VecPredRegContainer
=
::gem5::DummyVecPredRegContainer
;
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}
// namespace SparcISA
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}
// namespace gem5
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#endif
vec_pred_reg.hh
vec_reg.hh
gem5::DummyVecPredRegContainer
Dummy type aliases and constants for architectures that do not implement vector predicate registers.
Definition:
vec_pred_reg.hh:398
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition:
gpu_translation_state.hh:37
gem5::DummyVecRegContainer
Dummy type aliases and constants for architectures that do not implement vector registers.
Definition:
vec_reg.hh:268
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