gem5  v22.1.0.0
design.h
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3  Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
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21 
22  design.h --
23 
24  Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15
25 
26  *****************************************************************************/
27 
28 /*****************************************************************************
29 
30  MODIFICATION LOG - modifiers, enter your name, affiliation, date and
31  changes you are making here.
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33  Name, Affiliation, Date:
34  Description of Modification:
35 
36  *****************************************************************************/
37 
38 
39 SC_MODULE(design) {
40  // ports
41  sc_in_clk clock;
42  sc_in<bool > take_the_data;
43  sc_in<bool > data_request;
44  sc_out<bool > data_ready;
45  sc_out<bool > write_in_is_done;
46  sc_in <DATA_TYPE > input;
47  sc_out<DATA_TYPE > output;
48  sc_signal<DATA_TYPE > ring_buffer[RING_BUFFER_SIZE];
49  sc_signal<INDEX_TYPE > read_pointer;
50  sc_signal<INDEX_TYPE > write_pointer;
51  // processes
52  void write_in_fifo();
53  void read_out_fifo();
54  SC_CTOR(design) {
55  SC_CTHREAD(write_in_fifo, clock.pos() );
56  SC_CTHREAD(read_out_fifo, clock.pos() );
57  // bad reset
58  write_pointer = (INDEX_TYPE)0 ;
59  read_pointer = (INDEX_TYPE)0 ;
60  }
61 
62 };
#define INDEX_TYPE
Definition: def.h:39
#define RING_BUFFER_SIZE
Definition: def.h:38
std::ostream & output()
Get the ostream from the current global logger.
Definition: trace.cc:79
sc_in< bool > sc_in_clk
Definition: sc_clock.hh:116
#define SC_CTHREAD(name, clk)
Definition: sc_module.hh:323
#define SC_CTOR(name)
Definition: sc_module.hh:297
SC_MODULE(design)
Definition: design.h:39

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