gem5  v21.1.0.2
Public Member Functions | Public Attributes | List of all members
gem5::Trace::TarmacParserRecord::TarmacParserRecordEvent Struct Reference

Event triggered to check the value of the destination registers. More...

#include <tarmac_parser.hh>

Inheritance diagram for gem5::Trace::TarmacParserRecord::TarmacParserRecordEvent:
gem5::Event gem5::EventBase gem5::Serializable

Public Member Functions

 TarmacParserRecordEvent (TarmacParser &_parent, ThreadContext *_thread, const StaticInstPtr _inst, ArmISA::PCState _pc, bool _mismatch, bool _mismatch_on_pc_or_opcode)
 
void process ()
 
const char * description () const
 Return a C string describing the event. More...
 
- Public Member Functions inherited from gem5::Event
 Event (Priority p=Default_Pri, Flags f=0)
 
bool scheduled () const
 Determine if the current event is scheduled. More...
 
void squash ()
 Squash the current event. More...
 
bool squashed () const
 Check whether the event is squashed. More...
 
bool isExitEvent () const
 See if this is a SimExitEvent (without resorting to RTTI) More...
 
bool isManaged () const
 Check whether this event will auto-delete. More...
 
bool isAutoDelete () const
 The function returns true if the object is automatically deleted after the event is processed. More...
 
Tick when () const
 Get the time that the event is scheduled. More...
 
Priority priority () const
 Get the event priority. More...
 
virtual BaseGlobalEventglobalEvent ()
 If this is part of a GlobalEvent, return the pointer to the Global Event. More...
 
void serialize (CheckpointOut &cp) const override
 Serialize an object. More...
 
void unserialize (CheckpointIn &cp) override
 Unserialize an object. More...
 
virtual ~Event ()
 
virtual const std::string name () const
 
void dump () const
 Dump the current event data. More...
 
- Public Member Functions inherited from gem5::Serializable
 Serializable ()
 
virtual ~Serializable ()
 
void serializeSection (CheckpointOut &cp, const char *name) const
 Serialize an object into a new section. More...
 
void serializeSection (CheckpointOut &cp, const std::string &name) const
 
void unserializeSection (CheckpointIn &cp, const char *name)
 Unserialize an a child object. More...
 
void unserializeSection (CheckpointIn &cp, const std::string &name)
 

Public Attributes

TarmacParserparent
 Reference to the TARMAC trace object to which this record belongs. More...
 
ThreadContextthread
 Current thread context. More...
 
const StaticInstPtr inst
 Current instruction. More...
 
ArmISA::PCState pc
 PC of the current instruction. More...
 
bool mismatch
 True if a mismatch has been detected for this instruction. More...
 
bool mismatchOnPcOrOpcode
 True if a mismatch has been detected for this instruction on PC or opcode. More...
 

Additional Inherited Members

- Public Types inherited from gem5::EventBase
typedef int8_t Priority
 
- Static Public Member Functions inherited from gem5::Serializable
static const std::string & currentSection ()
 Gets the fully-qualified name of the active section. More...
 
static void generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream)
 Generate a checkpoint file so that the serialization can be routed to it. More...
 
- Static Public Attributes inherited from gem5::EventBase
static const Priority Minimum_Pri = SCHAR_MIN
 Event priorities, to provide tie-breakers for events scheduled at the same cycle. More...
 
static const Priority Debug_Enable_Pri = -101
 If we enable tracing on a particular cycle, do that as the very first thing so we don't miss any of the events on that cycle (even if we enter the debugger). More...
 
static const Priority Debug_Break_Pri = -100
 Breakpoints should happen before anything else (except enabling trace output), so we don't miss any action when debugging. More...
 
static const Priority CPU_Switch_Pri = -31
 CPU switches schedule the new CPU's tick event for the same cycle (after unscheduling the old CPU's tick event). More...
 
static const Priority Delayed_Writeback_Pri = -1
 For some reason "delayed" inter-cluster writebacks are scheduled before regular writebacks (which have default priority). More...
 
static const Priority Default_Pri = 0
 Default is zero for historical reasons. More...
 
static const Priority DVFS_Update_Pri = 31
 DVFS update event leads to stats dump therefore given a lower priority to ensure all relevant states have been updated. More...
 
static const Priority Serialize_Pri = 32
 Serailization needs to occur before tick events also, so that a serialize/unserialize is identical to an on-line CPU switch. More...
 
static const Priority CPU_Tick_Pri = 50
 CPU ticks must come after other associated CPU events (such as writebacks). More...
 
static const Priority CPU_Exit_Pri = 64
 If we want to exit a thread in a CPU, it comes after CPU_Tick_Pri. More...
 
static const Priority Stat_Event_Pri = 90
 Statistics events (dump, reset, etc.) come after everything else, but before exit. More...
 
static const Priority Progress_Event_Pri = 95
 Progress events come at the end. More...
 
static const Priority Sim_Exit_Pri = 100
 If we want to exit on this cycle, it's the very last thing we do. More...
 
static const Priority Maximum_Pri = SCHAR_MAX
 Maximum priority. More...
 
- Protected Types inherited from gem5::EventBase
typedef unsigned short FlagsType
 
typedef ::gem5::Flags< FlagsTypeFlags
 
- Protected Member Functions inherited from gem5::Event
Flags getFlags () const
 
bool isFlagSet (Flags _flags) const
 
void setFlags (Flags _flags)
 
void clearFlags (Flags _flags)
 
void clearFlags ()
 
virtual void trace (const char *action)
 This function isn't really useful if TRACING_ON is not defined. More...
 
const std::string instanceString () const
 Return the instance number as a string. More...
 
void acquire ()
 Memory management hooks for events that have the Managed flag set. More...
 
void release ()
 Managed event removed from the event queue. More...
 
virtual void acquireImpl ()
 
virtual void releaseImpl ()
 
- Static Protected Attributes inherited from gem5::EventBase
static const FlagsType PublicRead = 0x003f
 
static const FlagsType PublicWrite = 0x001d
 
static const FlagsType Squashed = 0x0001
 
static const FlagsType Scheduled = 0x0002
 
static const FlagsType Managed = 0x0004
 
static const FlagsType AutoDelete = Managed
 
static const FlagsType Reserved0 = 0x0008
 This used to be AutoSerialize. More...
 
static const FlagsType IsExitEvent = 0x0010
 
static const FlagsType IsMainQueue = 0x0020
 
static const FlagsType Initialized = 0x7a40
 
static const FlagsType InitMask = 0xffc0
 

Detailed Description

Event triggered to check the value of the destination registers.

Needed to handle some cases where registers are modified after the trace record has been dumped. E.g., the SVC instruction updates the CPSR and SPSR as part of the fault handling routine.

Definition at line 75 of file tarmac_parser.hh.

Constructor & Destructor Documentation

◆ TarmacParserRecordEvent()

gem5::Trace::TarmacParserRecord::TarmacParserRecordEvent::TarmacParserRecordEvent ( TarmacParser _parent,
ThreadContext _thread,
const StaticInstPtr  _inst,
ArmISA::PCState  _pc,
bool  _mismatch,
bool  _mismatch_on_pc_or_opcode 
)
inline

Definition at line 95 of file tarmac_parser.hh.

Member Function Documentation

◆ description()

const char * gem5::Trace::TarmacParserRecord::TarmacParserRecordEvent::description ( ) const
virtual

Return a C string describing the event.

This string should not be dynamically allocated; just a const char array describing the event class.

Reimplemented from gem5::Event.

Definition at line 942 of file tarmac_parser.cc.

◆ process()

void gem5::Trace::TarmacParserRecord::TarmacParserRecordEvent::process ( )
virtual

Member Data Documentation

◆ inst

const StaticInstPtr gem5::Trace::TarmacParserRecord::TarmacParserRecordEvent::inst

Current instruction.

Definition at line 84 of file tarmac_parser.hh.

◆ mismatch

bool gem5::Trace::TarmacParserRecord::TarmacParserRecordEvent::mismatch

True if a mismatch has been detected for this instruction.

Definition at line 88 of file tarmac_parser.hh.

◆ mismatchOnPcOrOpcode

bool gem5::Trace::TarmacParserRecord::TarmacParserRecordEvent::mismatchOnPcOrOpcode

True if a mismatch has been detected for this instruction on PC or opcode.

Definition at line 93 of file tarmac_parser.hh.

◆ parent

TarmacParser& gem5::Trace::TarmacParserRecord::TarmacParserRecordEvent::parent

Reference to the TARMAC trace object to which this record belongs.

Definition at line 80 of file tarmac_parser.hh.

◆ pc

ArmISA::PCState gem5::Trace::TarmacParserRecord::TarmacParserRecordEvent::pc

PC of the current instruction.

Definition at line 86 of file tarmac_parser.hh.

◆ thread

ThreadContext* gem5::Trace::TarmacParserRecord::TarmacParserRecordEvent::thread

Current thread context.

Definition at line 82 of file tarmac_parser.hh.


The documentation for this struct was generated from the following files:

Generated on Tue Sep 21 2021 12:32:32 for gem5 by doxygen 1.8.17