gem5 v24.0.0.0
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tb.h
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1/*****************************************************************************
2
3 Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
4 more contributor license agreements. See the NOTICE file distributed
5 with this work for additional information regarding copyright ownership.
6 Accellera licenses this file to you under the Apache License, Version 2.0
7 (the "License"); you may not use this file except in compliance with the
8 License. You may obtain a copy of the License at
9
10 http://www.apache.org/licenses/LICENSE-2.0
11
12 Unless required by applicable law or agreed to in writing, software
13 distributed under the License is distributed on an "AS IS" BASIS,
14 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
15 implied. See the License for the specific language governing
16 permissions and limitations under the License.
17
18 *****************************************************************************/
19
20/*****************************************************************************
21
22 tb.h --
23
24 Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15
25
26 *****************************************************************************/
27
28/*****************************************************************************
29
30 MODIFICATION LOG - modifiers, enter your name, affiliation, date and
31 changes you are making here.
32
33 Name, Affiliation, Date:
34 Description of Modification:
35
36 *****************************************************************************/
37
38/******************************************************************************/
39/*************************** testbench Class Definition ********************/
40/******************************************************************************/
41
42#include "common.h"
43
44SC_MODULE( TESTBENCH )
45{
46 sc_signal<bool> reset;
47 sc_signal<bool> in_ok;
48 sc_signal<bool> out_ok;
49 sc_signal<bool> instrb;
50 sc_signal<bool> outstrb;
51 signal_bool_vector a1,a2,a3,a4,a5,a6,a7,a8; // -128 to 127
52 signal_bool_vector d1,d2,d3,d4,d5,d6,d7,d8; // -128 to 127
53 STIM st1;
54 BUBBLE bubble;
55 DISPLAY disp1;
56
57 TESTBENCH( sc_module_name NAME,
58 sc_clock& TICK )
59
60 : st1 ("ST1", TICK, reset, in_ok, out_ok, instrb, outstrb,
61 a1, a2, a3, a4, a5, a6, a7, a8,
62 d1, d2, d3, d4, d5, d6, d7, d8) ,
63
64 bubble ("B1", TICK, reset, in_ok, out_ok, instrb, outstrb,
65 a1, a2, a3, a4, a5, a6, a7, a8,
66 d1, d2, d3, d4, d5, d6, d7, d8) ,
67
68 disp1 ("D1", reset, in_ok, out_ok, instrb, outstrb,
69 a1, a2, a3, a4, a5, a6, a7, a8,
70 d1, d2, d3, d4, d5, d6, d7, d8)
71 {}
72};
#define SC_MODULE(name)
Definition sc_module.hh:295
sc_signal< bool_vector > signal_bool_vector
Definition common.h:44

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