gem5 v24.0.0.0
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clocks.h
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1/*****************************************************************************
2
3 Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
4 more contributor license agreements. See the NOTICE file distributed
5 with this work for additional information regarding copyright ownership.
6 Accellera licenses this file to you under the Apache License, Version 2.0
7 (the "License"); you may not use this file except in compliance with the
8 License. You may obtain a copy of the License at
9
10 http://www.apache.org/licenses/LICENSE-2.0
11
12 Unless required by applicable law or agreed to in writing, software
13 distributed under the License is distributed on an "AS IS" BASIS,
14 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
15 implied. See the License for the specific language governing
16 permissions and limitations under the License.
17
18 *****************************************************************************/
19
20/*****************************************************************************
21
22 clocks.h --
23
24 Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15
25
26 *****************************************************************************/
27
28/*****************************************************************************
29
30 MODIFICATION LOG - modifiers, enter your name, affiliation, date and
31 changes you are making here.
32
33 Name, Affiliation, Date:
34 Description of Modification:
35
36 *****************************************************************************/
37
38/* Filename clocks.h */
39/* This is an integrated interface & implementation file for */
40/* all clock processes that react to the clock edges */
41
42#include "systemc.h"
43
44// First process
45SC_MODULE( clk_pos )
46{
47 SC_HAS_PROCESS( clk_pos );
48
49 sc_in_clk clk;
50
51 sc_signal<bool>& out_clk_pos;
52
53 clk_pos(sc_module_name NAME,
54 sc_clock& TICK_P,
55 sc_signal<bool>& OUT_CLK_POS)
56 :
57 out_clk_pos(OUT_CLK_POS)
58 {
59 clk(TICK_P);
60 SC_CTHREAD( entry, clk.pos() );
61 }
62
63 void entry();
64};
65
66void
67clk_pos::entry()
68{
69 out_clk_pos.write(1); cout << "Clk Pos 1\n";
70 wait();
71 out_clk_pos.write(0); cout << "Clk Pos 0\n";
72 wait();
73}
74
75// Second process
76SC_MODULE( clk_neg )
77{
78 SC_HAS_PROCESS( clk_neg );
79
80 sc_in_clk clk;
81
82 sc_signal<bool>& out_clk_neg;
83
84 clk_neg(sc_module_name NAME,
85 sc_clock& TICK_N,
86 sc_signal<bool>& OUT_CLK_NEG)
87 :
88 out_clk_neg(OUT_CLK_NEG)
89 {
90 clk(TICK_N);
91 SC_CTHREAD( entry, clk.neg() );
92 }
93
94 void entry();
95};
96
97void
98clk_neg::entry()
99{
100 out_clk_neg.write(1); cout << "Clk Neg 1\n";
101 wait();
102 out_clk_neg.write(0); cout << "Clk Neg 0\n";
103 wait();
104}
105
106// Third process
107SC_MODULE( clk2_pos )
108{
109 SC_HAS_PROCESS( clk2_pos );
110
111 sc_in_clk clk;
112
113 sc_signal<bool>& out_clk2_pos;
114
115 clk2_pos(sc_module_name NAME,
116 sc_clock& TICK2_P,
117 sc_signal<bool>& OUT_CLK2_POS)
118 :
119 out_clk2_pos(OUT_CLK2_POS)
120 {
121 clk(TICK2_P);
122 SC_CTHREAD( entry, clk.pos() );
123 }
124
125 void entry();
126};
127
128void
129clk2_pos::entry()
130{
131 out_clk2_pos.write(1); cout << "Clk2 Pos 1\n";
132 wait();
133 out_clk2_pos.write(0); cout << "Clk2 Pos 0\n";
134 wait();
135}
136
137// Fourth process
138SC_MODULE( clk2_neg )
139{
140 SC_HAS_PROCESS( clk2_neg );
141
142 sc_in_clk clk;
143
144 sc_signal<bool>& out_clk2_neg;
145
146 clk2_neg(sc_module_name NAME,
147 sc_clock& TICK2_N,
148 sc_signal<bool>& OUT_CLK2_NEG)
149 :
150 out_clk2_neg (OUT_CLK2_NEG)
151 {
152 clk(TICK2_N);
153 SC_CTHREAD( entry, clk.neg() );
154 }
155
156 void entry();
157};
158
159void
160clk2_neg::entry()
161{
162 out_clk2_neg.write(1); cout << "Clk2 Neg 1\n";
163 wait();
164 out_clk2_neg.write(0); cout << "Clk2 Neg 0\n";
165 wait();
166}
#define SC_CTHREAD(name, clk)
Definition sc_module.hh:323
#define SC_MODULE(name)
Definition sc_module.hh:295
#define SC_HAS_PROCESS(name)
Definition sc_module.hh:301

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