gem5
v20.1.0.0
arch
riscv
remote_gdb.hh
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/*
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* Copyright (c) 2017 The University of Virginia
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* Copyright 2015 LabWare
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* Copyright 2014 Google, Inc.
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* Copyright (c) 2007 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __ARCH_RISCV_REMOTE_GDB_HH__
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#define __ARCH_RISCV_REMOTE_GDB_HH__
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#include <string>
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#include "
arch/riscv/registers.hh
"
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#include "
base/remote_gdb.hh
"
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class
System
;
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class
ThreadContext
;
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namespace
RiscvISA
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{
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class
RemoteGDB
:
public
BaseRemoteGDB
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{
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protected
:
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static
const
int
NumGDBRegs
= 4162;
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static
const
int
NumCSRs
= 4096;
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bool
acc
(
Addr
addr
,
size_t
len
)
override
;
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// A breakpoint will be 2 bytes if it is compressed and 4 if not
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bool
checkBpLen
(
size_t
len
)
override
{
return
len
== 2 ||
len
== 4; }
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class
RiscvGdbRegCache
:
public
BaseGdbRegCache
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{
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using
BaseGdbRegCache::BaseGdbRegCache
;
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private
:
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struct
{
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uint64_t
gpr
[
NumIntArchRegs
];
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uint64_t
pc
;
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}
r
;
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public
:
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char
*
data
()
const
{
return
(
char
*)&
r
; }
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size_t
size
()
const
{
return
sizeof
(
r
); }
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void
getRegs
(
ThreadContext
*);
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void
setRegs
(
ThreadContext
*)
const
;
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const
std::string
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name
()
const
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{
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return
gdb
->
name
() +
".RiscvGdbRegCache"
;
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}
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};
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RiscvGdbRegCache
regCache
;
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public
:
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RemoteGDB
(
System
*_system,
ThreadContext
*
tc
,
int
_port
);
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BaseGdbRegCache
*
gdbRegs
()
override
;
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};
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}
// namespace RiscvISA
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#endif
/* __ARCH_RISCV_REMOTE_GDB_H__ */
RiscvISA::RemoteGDB::RiscvGdbRegCache
Definition:
remote_gdb.hh:56
RiscvISA::RemoteGDB::NumCSRs
static const int NumCSRs
Definition:
remote_gdb.hh:50
remote_gdb.hh
RiscvISA::RemoteGDB::RiscvGdbRegCache::getRegs
void getRegs(ThreadContext *)
Fill the raw buffer from the registers in the ThreadContext.
Definition:
remote_gdb.cc:179
BaseGdbRegCache::gdb
BaseRemoteGDB * gdb
Definition:
remote_gdb.hh:125
BaseGdbRegCache::BaseGdbRegCache
BaseGdbRegCache(BaseRemoteGDB *g)
Definition:
remote_gdb.hh:119
RiscvISA::RemoteGDB::RiscvGdbRegCache::setRegs
void setRegs(ThreadContext *) const
Set the ThreadContext's registers from the values in the raw buffer.
Definition:
remote_gdb.cc:188
RiscvISA::RemoteGDB::gdbRegs
BaseGdbRegCache * gdbRegs() override
Definition:
remote_gdb.cc:197
RiscvISA::RemoteGDB::RiscvGdbRegCache::size
size_t size() const
Return the size of the raw buffer, in bytes (i.e., half of the number of digits in the g/G packet).
Definition:
remote_gdb.hh:66
BaseRemoteGDB::tc
ThreadContext * tc
Definition:
remote_gdb.hh:212
RiscvISA::RemoteGDB::RiscvGdbRegCache::pc
uint64_t pc
Definition:
remote_gdb.hh:62
RiscvISA
Definition:
fs_workload.cc:36
RiscvISA::RemoteGDB::checkBpLen
bool checkBpLen(size_t len) override
Definition:
remote_gdb.hh:54
ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition:
thread_context.hh:88
RiscvISA::RemoteGDB::RiscvGdbRegCache::r
struct RiscvISA::RemoteGDB::RiscvGdbRegCache::@17 r
System
Definition:
system.hh:73
BaseRemoteGDB::_port
int _port
Definition:
remote_gdb.hh:193
RiscvISA::RemoteGDB::RiscvGdbRegCache::data
char * data() const
Return the pointer to the raw bytes buffer containing the register values.
Definition:
remote_gdb.hh:65
RiscvISA::RemoteGDB::acc
bool acc(Addr addr, size_t len) override
Definition:
remote_gdb.cc:154
RiscvISA::NumIntArchRegs
const int NumIntArchRegs
Definition:
registers.hh:79
BaseRemoteGDB
Definition:
remote_gdb.hh:43
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition:
types.hh:142
BaseGdbRegCache
Concrete subclasses of this abstract class represent how the register values are transmitted on the w...
Definition:
remote_gdb.hh:70
registers.hh
RiscvISA::RemoteGDB
Definition:
remote_gdb.hh:46
RiscvISA::RemoteGDB::regCache
RiscvGdbRegCache regCache
Definition:
remote_gdb.hh:77
RiscvISA::RemoteGDB::NumGDBRegs
static const int NumGDBRegs
Definition:
remote_gdb.hh:49
RiscvISA::RemoteGDB::RiscvGdbRegCache::name
const std::string name() const
Return the name to use in places like DPRINTF.
Definition:
remote_gdb.hh:71
RiscvISA::RemoteGDB::RiscvGdbRegCache::gpr
uint64_t gpr[NumIntArchRegs]
Definition:
remote_gdb.hh:61
ArmISA::len
Bitfield< 18, 16 > len
Definition:
miscregs_types.hh:439
addr
ip6_addr_t addr
Definition:
inet.hh:423
BaseRemoteGDB::name
std::string name()
Definition:
remote_gdb.cc:332
RiscvISA::RemoteGDB::RemoteGDB
RemoteGDB(System *_system, ThreadContext *tc, int _port)
Definition:
remote_gdb.cc:148
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