gem5  v20.1.0.0
datatypes.h
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20 /*****************************************************************************
21 
22  datatypes.h --
23 
24  Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30
25 
26  *****************************************************************************/
27 
28 /*****************************************************************************
29 
30  MODIFICATION LOG - modifiers, enter your name, affiliation, date and
31  changes you are making here.
32 
33  Name, Affiliation, Date:
34  Description of Modification:
35 
36  *****************************************************************************/
37 
38 
39 #include "common.h"
40 
41 SC_MODULE( datatypes )
42 {
43  SC_HAS_PROCESS( datatypes );
44 
45  sc_in_clk clk;
46 
47  //====================================================================
48  // [C] Always Needed Member Function
49  // -- constructor
50  // -- entry
51  //====================================================================
52 
53  const sc_signal<bool>& reset ;
54  const sc_signal_bool_vector2& in_value1; // Input port
55  const sc_signal_bool_vector2& in_value2; // Input port
56  const sc_signal_bool_vector3& in_value3; // Input port
57  const sc_signal_bool_vector3& in_value4; // Input port
58  const sc_signal<bool>& in_valid; // Input port
59  sc_signal_bool_vector2& out_value1; // Output port
60  sc_signal_bool_vector2& out_value2; // Output port
61  sc_signal_bool_vector3& out_value3; // Output port
62  sc_signal_bool_vector3& out_value4; // Output port
63  sc_signal<bool>& out_ack; // Output port
64  sc_signal<bool>& out_valid; // Output port
65 
66 
67  //
68  // Constructor
69  //
70 
71  datatypes (
72  sc_module_name NAME, // referense name
73  sc_clock& CLK, // clock
74  const sc_signal<bool>& RESET,
75  const sc_signal_bool_vector2& IN_VALUE1,
76  const sc_signal_bool_vector2& IN_VALUE2,
77  const sc_signal_bool_vector3& IN_VALUE3,
78  const sc_signal_bool_vector3& IN_VALUE4,
79  const sc_signal<bool>& IN_VALID, // Input port
80  sc_signal_bool_vector2& OUT_VALUE1,
81  sc_signal_bool_vector2& OUT_VALUE2,
82  sc_signal_bool_vector3& OUT_VALUE3,
83  sc_signal_bool_vector3& OUT_VALUE4,
84  sc_signal<bool>& OUT_ACK,
85  sc_signal<bool>& OUT_VALID // Output port
86  )
87  :
88  reset (RESET),
89  in_value1 (IN_VALUE1),
90  in_value2 (IN_VALUE2),
91  in_value3 (IN_VALUE3),
92  in_value4 (IN_VALUE4),
93  in_valid (IN_VALID),
94  out_value1 (OUT_VALUE1),
95  out_value2 (OUT_VALUE2),
96  out_value3 (OUT_VALUE3),
97  out_value4 (OUT_VALUE4),
98  out_ack (OUT_ACK),
99  out_valid (OUT_VALID)
100 
101  {
102  clk (CLK);
103  SC_CTHREAD( entry, clk.pos() );
104  reset_signal_is(reset,true);
105  };
106 
107  //
108 
109 void entry ();
110 
111 };
112 
113 // EOF
114 
115 
sc_signal_bool_vector2
sc_signal< sc_bv< 2 > > sc_signal_bool_vector2
Definition: common.h:43
Stats::reset
void reset()
Definition: statistics.cc:569
SC_MODULE
SC_MODULE(datatypes)
Definition: datatypes.h:40
common.h
sc_core::sc_in_clk
sc_in< bool > sc_in_clk
Definition: sc_clock.hh:116
sc_signal_bool_vector3
sc_signal< sc_bv< 3 > > sc_signal_bool_vector3
Definition: common.h:44
SC_HAS_PROCESS
#define SC_HAS_PROCESS(name)
Definition: sc_module.hh:297
SC_CTHREAD
#define SC_CTHREAD(name, clk)
Definition: sc_module.hh:319

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