gem5  v20.1.0.0
datatypes.h
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3  Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
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20 /*****************************************************************************
21 
22  datatypes.h --
23 
24  Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14
25 
26  *****************************************************************************/
27 
28 /*****************************************************************************
29 
30  MODIFICATION LOG - modifiers, enter your name, affiliation, date and
31  changes you are making here.
32 
33  Name, Affiliation, Date:
34  Description of Modification:
35 
36  *****************************************************************************/
37 
38 
39 #include "common.h"
40 
41 SC_MODULE( datatypes )
42 {
43  SC_HAS_PROCESS( datatypes );
44 
45  sc_in_clk clk;
46 
47  //====================================================================
48  // [C] Always Needed Member Function
49  // -- constructor
50  // -- entry
51  //====================================================================
52 
53  const sc_signal<bool>& reset ;
54  const sc_signal_bool_vector& in_value1; // Input port
55  const sc_signal_bool_vector& in_value2; // Input port
56  const sc_signal<long>& in_value3; // Input port
57  const sc_signal<int>& in_value4; // Input port
58  const sc_signal<short>& in_value5; // Input port
59  const sc_signal<char>& in_value6; // Input port
60  const sc_signal<bool>& in_valid; // Input port
61  sc_signal<bool>& out_ack; // Output port
62  sc_signal_bool_vector& out_value1; // Output port
63  sc_signal_bool_vector& out_value2; // Output port
64  sc_signal<long>& out_value3; // Output port
65  sc_signal<int>& out_value4; // Output port
66  sc_signal<short>& out_value5; // Output port
67  sc_signal<char>& out_value6; // Output port
68  sc_signal<bool>& out_valid; // Output port
69 
70  //
71  // Constructor
72  //
73 
74  datatypes(
75  sc_module_name NAME, // referense name
76  sc_clock& CLK, // clock
77  const sc_signal<bool>& RESET,
78  const sc_signal_bool_vector& IN_VALUE1,
79  const sc_signal_bool_vector& IN_VALUE2,
80  const sc_signal<long>& IN_VALUE3,
81  const sc_signal<int>& IN_VALUE4,
82  const sc_signal<short>& IN_VALUE5,
83  const sc_signal<char>& IN_VALUE6,
84  const sc_signal<bool>& IN_VALID,
85 
86  sc_signal<bool>& OUT_ACK,
87  sc_signal_bool_vector& OUT_VALUE1,
88  sc_signal_bool_vector& OUT_VALUE2,
89  sc_signal<long>& OUT_VALUE3,
90  sc_signal<int>& OUT_VALUE4,
91  sc_signal<short>& OUT_VALUE5,
92  sc_signal<char>& OUT_VALUE6,
93  sc_signal<bool>& OUT_VALID
94  )
95  :
96  reset (RESET),
97  in_value1 (IN_VALUE1),
98  in_value2 (IN_VALUE2),
99  in_value3 (IN_VALUE3),
100  in_value4 (IN_VALUE4),
101  in_value5 (IN_VALUE5),
102  in_value6 (IN_VALUE6),
103  in_valid (IN_VALID),
104  out_ack (OUT_ACK),
105  out_value1 (OUT_VALUE1),
106  out_value2 (OUT_VALUE2),
107  out_value3 (OUT_VALUE3),
108  out_value4 (OUT_VALUE4),
109  out_value5 (OUT_VALUE5),
110  out_value6 (OUT_VALUE6),
111  out_valid (OUT_VALID)
112 
113  {
114  clk (CLK);
115  SC_CTHREAD( entry, clk.pos() );
116  reset_signal_is(reset,true);
117  };
118 
119 //Process Functionality: Described in the member function below
120  void entry();
121 };
122 
123 // EOF
124 
125 
126 
sc_signal_bool_vector
sc_signal< sc_bv< 8 > > sc_signal_bool_vector
Definition: common.h:43
common.h
Stats::reset
void reset()
Definition: statistics.cc:569
SC_MODULE
SC_MODULE(datatypes)
Definition: datatypes.h:40
sc_core::sc_in_clk
sc_in< bool > sc_in_clk
Definition: sc_clock.hh:116
SC_HAS_PROCESS
#define SC_HAS_PROCESS(name)
Definition: sc_module.hh:297
SC_CTHREAD
#define SC_CTHREAD(name, clk)
Definition: sc_module.hh:319

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