ArmISA::BaseISADevice Class Reference

Base class for devices that use the MiscReg interfaces. More...

#include <isa_device.hh>

Inheritance diagram for ArmISA::BaseISADevice:

Public Member Functions
	BaseISADevice ()
virtual	~BaseISADevice ()
virtual void	setISA (ISA *isa)
virtual void	setThreadContext (ThreadContext *tc)
virtual void	setMiscReg (int misc_reg, RegVal val)=0
	Write to a system register belonging to this device. More...
virtual RegVal	readMiscReg (int misc_reg)=0
	Read a system register belonging to this device. More...

Protected Attributes
ISA *	isa

Detailed Description

Base class for devices that use the MiscReg interfaces.

This class provides a well-defined interface that the ArmISA class can use when forwarding MiscReg accesses to a device model (e.g., a PMU or GIC).

Definition at line 58 of file isa_device.hh.

Constructor & Destructor Documentation

BaseISADevice()

ArmISA::BaseISADevice::BaseISADevice

(

)

Definition at line 45 of file isa_device.cc.

~BaseISADevice()

virtual ArmISA::BaseISADevice::~BaseISADevice ( )

inlinevirtual

Definition at line 62 of file isa_device.hh.

Member Function Documentation

readMiscReg()

virtual RegVal ArmISA::BaseISADevice::readMiscReg ( int  misc_reg )

pure virtual

Read a system register belonging to this device.

Parameters

misc_reg

Register number (see miscregs.hh)

Returns

Register value.

Implemented in GenericTimerISA, Gicv3CPUInterface, ArmISA::PMU, and ArmISA::DummyISADevice.

Referenced by ArmISA::ISA::readMiscReg().

setISA()

void ArmISA::BaseISADevice::setISA ( ISA *  isa )

virtual

Definition at line 51 of file isa_device.cc.

References isa.

Referenced by ArmISA::ISA::ISA().

setMiscReg()

virtual void ArmISA::BaseISADevice::setMiscReg ( int  misc_reg, RegVal  val  )

pure virtual

Write to a system register belonging to this device.

Parameters

misc_reg	Register number (see miscregs.hh)
val	Value to store

Implemented in GenericTimerISA, Gicv3CPUInterface, ArmISA::PMU, and ArmISA::DummyISADevice.

Referenced by ArmISA::ISA::setMiscReg().

setThreadContext()

virtual void ArmISA::BaseISADevice::setThreadContext ( ThreadContext *  tc )

inlinevirtual

Reimplemented in Gicv3CPUInterface, and ArmISA::PMU.

Definition at line 65 of file isa_device.hh.

Referenced by ArmISA::ISA::setupThreadContext().

Member Data Documentation

isa

ISA* ArmISA::BaseISADevice::isa

protected

Definition at line 84 of file isa_device.hh.

Referenced by Gicv3CPUInterface::bpr1(), Gicv3CPUInterface::currEL(), Gicv3CPUInterface::dropPriority(), Gicv3CPUInterface::eoiMaintenanceInterruptStatus(), Gicv3CPUInterface::getHCREL2FMO(), Gicv3CPUInterface::getHCREL2IMO(), Gicv3CPUInterface::getHPPIR1(), Gicv3CPUInterface::getHPPVILR(), Gicv3CPUInterface::groupEnabled(), Gicv3CPUInterface::groupPriorityMask(), Gicv3CPUInterface::highestActiveGroup(), Gicv3CPUInterface::highestActivePriority(), Gicv3CPUInterface::hppiCanPreempt(), Gicv3CPUInterface::hppviCanPreempt(), Gicv3CPUInterface::inSecureState(), Gicv3CPUInterface::isAA64(), Gicv3CPUInterface::isEL3OrMon(), Gicv3CPUInterface::isEOISplitMode(), Gicv3CPUInterface::isSecureBelowEL3(), Gicv3CPUInterface::maintenanceInterruptStatus(), Gicv3CPUInterface::readBankedMiscReg(), Gicv3CPUInterface::readMiscReg(), Gicv3CPUInterface::setBankedMiscReg(), setISA(), Gicv3CPUInterface::setMiscReg(), Gicv3CPUInterface::virtualActivateIRQ(), Gicv3CPUInterface::virtualDeactivateIRQ(), Gicv3CPUInterface::virtualDropPriority(), Gicv3CPUInterface::virtualFindActive(), Gicv3CPUInterface::virtualGroupPriorityMask(), Gicv3CPUInterface::virtualHighestActivePriority(), Gicv3CPUInterface::virtualIncrementEOICount(), Gicv3CPUInterface::virtualIsEOISplitMode(), and Gicv3CPUInterface::virtualUpdate().

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The documentation for this class was generated from the following files:

• arch/arm/isa_device.hh
• arch/arm/isa_device.cc