gem5  v20.1.0.0
GenericISA::DelaySlotUPCState< MachInst > Member List

This is the complete list of members for GenericISA::DelaySlotUPCState< MachInst >, including all inherited members.

_nnpcGenericISA::DelaySlotPCState< MachInst >protected
_npcGenericISA::PCStateBaseprotected
_nupcGenericISA::DelaySlotUPCState< MachInst >protected
_pcGenericISA::PCStateBaseprotected
_upcGenericISA::DelaySlotUPCState< MachInst >protected
advance()GenericISA::DelaySlotPCState< MachInst >inline
Base typedefGenericISA::DelaySlotUPCState< MachInst >protected
branching() constGenericISA::DelaySlotUPCState< MachInst >inline
currentSection()Serializablestatic
DelaySlotPCState()GenericISA::DelaySlotPCState< MachInst >inline
DelaySlotPCState(Addr val)GenericISA::DelaySlotPCState< MachInst >inline
DelaySlotUPCState()GenericISA::DelaySlotUPCState< MachInst >inline
DelaySlotUPCState(Addr val)GenericISA::DelaySlotUPCState< MachInst >inline
instAddr() constGenericISA::PCStateBaseinline
microPC() constGenericISA::DelaySlotUPCState< MachInst >inline
nextInstAddr() constGenericISA::PCStateBaseinline
nnpc() constGenericISA::DelaySlotPCState< MachInst >inline
nnpc(Addr val)GenericISA::DelaySlotPCState< MachInst >inline
npc() constGenericISA::SimplePCState< MachInst >inline
npc(Addr val)GenericISA::SimplePCState< MachInst >inline
nupc() constGenericISA::DelaySlotUPCState< MachInst >inline
nupc(MicroPC val)GenericISA::DelaySlotUPCState< MachInst >inline
operator!=(const DelaySlotUPCState< MachInst > &opc) constGenericISA::DelaySlotUPCState< MachInst >inline
GenericISA::DelaySlotPCState::operator!=(const DelaySlotPCState< MachInst > &opc) constGenericISA::DelaySlotPCState< MachInst >inline
GenericISA::SimplePCState::operator!=(const PCStateBase &opc) constGenericISA::PCStateBaseinline
operator==(const DelaySlotUPCState< MachInst > &opc) constGenericISA::DelaySlotUPCState< MachInst >inline
GenericISA::DelaySlotPCState::operator==(const DelaySlotPCState< MachInst > &opc) constGenericISA::DelaySlotPCState< MachInst >inline
GenericISA::SimplePCState::operator==(const PCStateBase &opc) constGenericISA::PCStateBaseinline
pathSerializableprivatestatic
pc() constGenericISA::SimplePCState< MachInst >inline
pc(Addr val)GenericISA::SimplePCState< MachInst >inline
PCStateBase()GenericISA::PCStateBaseinlineprotected
PCStateBase(Addr val)GenericISA::PCStateBaseinlineprotected
Serializable()Serializable
serialize(CheckpointOut &cp) const overrideGenericISA::DelaySlotUPCState< MachInst >inlinevirtual
serializeAll(const std::string &cpt_dir)Serializablestatic
serializeSection(CheckpointOut &cp, const char *name) constSerializable
serializeSection(CheckpointOut &cp, const std::string &name) constSerializableinline
set(Addr val)GenericISA::DelaySlotUPCState< MachInst >inline
setNPC(Addr val)GenericISA::SimplePCState< MachInst >inline
SimplePCState()GenericISA::SimplePCState< MachInst >inline
SimplePCState(Addr val)GenericISA::SimplePCState< MachInst >inline
uAdvance()GenericISA::DelaySlotUPCState< MachInst >inline
uEnd()GenericISA::DelaySlotUPCState< MachInst >inline
unserialize(CheckpointIn &cp) overrideGenericISA::DelaySlotUPCState< MachInst >inlinevirtual
unserializeGlobals(CheckpointIn &cp)Serializablestatic
unserializeSection(CheckpointIn &cp, const char *name)Serializable
unserializeSection(CheckpointIn &cp, const std::string &name)Serializableinline
upc() constGenericISA::DelaySlotUPCState< MachInst >inline
upc(MicroPC val)GenericISA::DelaySlotUPCState< MachInst >inline
~Serializable()Serializablevirtual

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