| addInstEntry(std::vector< InstPtr > &queue, const TarmacContext &ptr) | Trace::TarmacTracerRecord | protectedvirtual |
| addMemEntry(std::vector< MemPtr > &queue, const TarmacContext &ptr) | Trace::TarmacTracerRecord | protectedvirtual |
| addr | Trace::InstRecord | protected |
| addRegEntry(std::vector< RegPtr > &queue, const TarmacContext &ptr) | Trace::TarmacTracerRecord | protectedvirtual |
| as_double | Trace::InstRecord | |
| as_int | Trace::InstRecord | |
| as_pred | Trace::InstRecord | |
| as_vec | Trace::InstRecord | |
| cp_seq | Trace::InstRecord | protected |
| cp_seq_valid | Trace::InstRecord | protected |
| data | Trace::InstRecord | protected |
| data_status | Trace::InstRecord | protected |
| DataDouble enum value | Trace::InstRecord | protected |
| DataInt16 enum value | Trace::InstRecord | protected |
| DataInt32 enum value | Trace::InstRecord | protected |
| DataInt64 enum value | Trace::InstRecord | protected |
| DataInt8 enum value | Trace::InstRecord | protected |
| DataInvalid enum value | Trace::InstRecord | protected |
| DataStatus enum name | Trace::InstRecord | protected |
| DataVec enum value | Trace::InstRecord | protected |
| DataVecPred enum value | Trace::InstRecord | protected |
| dump() override | Trace::TarmacTracerRecord | virtual |
| faulting | Trace::InstRecord | protected |
| fetch_seq | Trace::InstRecord | protected |
| fetch_seq_valid | Trace::InstRecord | protected |
| flags | Trace::InstRecord | protected |
| flushQueues(Queue &queue) | Trace::TarmacTracerRecord | protected |
| flushQueues(Queue &queue, Args &... args) | Trace::TarmacTracerRecord | protected |
| genRegister(const TarmacContext &tarmCtx, const RegId ®) | Trace::TarmacTracerRecord | inlineprotected |
| getAddr() const | Trace::InstRecord | inline |
| getCpSeq() const | Trace::InstRecord | inline |
| getCpSeqValid() const | Trace::InstRecord | inline |
| getDataStatus() const | Trace::InstRecord | inline |
| getFaulting() const | Trace::InstRecord | inline |
| getFetchSeq() const | Trace::InstRecord | inline |
| getFetchSeqValid() const | Trace::InstRecord | inline |
| getFlags() const | Trace::InstRecord | inline |
| getFloatData() const | Trace::InstRecord | inline |
| getIntData() const | Trace::InstRecord | inline |
| getMacroStaticInst() const | Trace::InstRecord | inline |
| getMemValid() const | Trace::InstRecord | inline |
| getPCState() const | Trace::InstRecord | inline |
| getSize() const | Trace::InstRecord | inline |
| getStaticInst() const | Trace::InstRecord | inline |
| getThread() const | Trace::InstRecord | inline |
| getWhen() const | Trace::InstRecord | inline |
| InstPtr typedef | Trace::TarmacTracerRecord | |
| InstRecord(Tick _when, ThreadContext *_thread, const StaticInstPtr _staticInst, TheISA::PCState _pc, const StaticInstPtr _macroStaticInst=NULL) | Trace::InstRecord | inline |
| ISET_A64 enum value | Trace::TarmacBaseRecord | |
| ISET_ARM enum value | Trace::TarmacBaseRecord | |
| ISET_THUMB enum value | Trace::TarmacBaseRecord | |
| ISET_UNSUPPORTED enum value | Trace::TarmacBaseRecord | |
| ISetState enum name | Trace::TarmacBaseRecord | |
| macroStaticInst | Trace::InstRecord | protected |
| mem_valid | Trace::InstRecord | protected |
| MemPtr typedef | Trace::TarmacTracerRecord | |
| mergeCCEntry(std::vector< RegPtr > &queue, const TarmacContext &tarmCtx) | Trace::TarmacTracerRecord | inlineprotected |
| pc | Trace::InstRecord | protected |
| pcToISetState(ArmISA::PCState pc) | Trace::TarmacBaseRecord | static |
| predicate | Trace::InstRecord | protected |
| REG_D enum value | Trace::TarmacBaseRecord | |
| REG_MISC enum value | Trace::TarmacBaseRecord | |
| REG_P enum value | Trace::TarmacBaseRecord | |
| REG_Q enum value | Trace::TarmacBaseRecord | |
| REG_R enum value | Trace::TarmacBaseRecord | |
| REG_S enum value | Trace::TarmacBaseRecord | |
| REG_X enum value | Trace::TarmacBaseRecord | |
| REG_Z enum value | Trace::TarmacBaseRecord | |
| RegPtr typedef | Trace::TarmacTracerRecord | |
| RegType enum name | Trace::TarmacBaseRecord | |
| setCPSeq(InstSeqNum seq) | Trace::InstRecord | inline |
| setData(std::array< T, N > d) | Trace::InstRecord | inline |
| setData(uint64_t d) | Trace::InstRecord | inline |
| setData(uint32_t d) | Trace::InstRecord | inline |
| setData(uint16_t d) | Trace::InstRecord | inline |
| setData(uint8_t d) | Trace::InstRecord | inline |
| setData(int64_t d) | Trace::InstRecord | inline |
| setData(int32_t d) | Trace::InstRecord | inline |
| setData(int16_t d) | Trace::InstRecord | inline |
| setData(int8_t d) | Trace::InstRecord | inline |
| setData(double d) | Trace::InstRecord | inline |
| setData(::VecRegContainer< TheISA::VecRegSizeBytes > &d) | Trace::InstRecord | inline |
| setData(::VecPredRegContainer< TheISA::VecPredRegSizeBits, TheISA::VecPredRegHasPackedRepr > &d) | Trace::InstRecord | inline |
| setFaulting(bool val) | Trace::InstRecord | inline |
| setFetchSeq(InstSeqNum seq) | Trace::InstRecord | inline |
| setMem(Addr a, Addr s, unsigned f) | Trace::InstRecord | inline |
| setPredicate(bool val) | Trace::InstRecord | inline |
| setWhen(Tick new_when) | Trace::InstRecord | inline |
| size | Trace::InstRecord | protected |
| staticInst | Trace::InstRecord | protected |
| TARMAC_INST enum value | Trace::TarmacBaseRecord | |
| TARMAC_MEM enum value | Trace::TarmacBaseRecord | |
| TARMAC_REG enum value | Trace::TarmacBaseRecord | |
| TARMAC_UNSUPPORTED enum value | Trace::TarmacBaseRecord | |
| TarmacBaseRecord(Tick _when, ThreadContext *_thread, const StaticInstPtr _staticInst, ArmISA::PCState _pc, const StaticInstPtr _macroStaticInst=NULL) | Trace::TarmacBaseRecord | |
| TarmacRecordType enum name | Trace::TarmacBaseRecord | |
| TarmacTracerRecord(Tick _when, ThreadContext *_thread, const StaticInstPtr _staticInst, ArmISA::PCState _pc, TarmacTracer &_tracer, const StaticInstPtr _macroStaticInst=NULL) | Trace::TarmacTracerRecord | |
| thread | Trace::InstRecord | protected |
| tracer | Trace::TarmacTracerRecord | protected |
| when | Trace::InstRecord | protected |
| ~InstRecord() | Trace::InstRecord | inlinevirtual |