- b -

b : arr_struct2 , Block , tlm::tlm_bool< D >
ba : PowerISA::CondLogicOp
backdoor : AbstractMemory
backdoorMap : sc_gem5::Gem5ToTlmBridge< BITWIDTH >
backendLatency : MemCtrl
backing : RegisterBufTest
backingStore : PhysicalMemory
badScore : Prefetcher::BOP
badvaddr : MipsISA::RemoteGDB::MipsGdbRegCache
bandwidth : GoodbyeObject , SimpleMemory
bank : DRAMInterface::Command , MemInterface::Bank , MemPacket
BANK_MASK : Gcn3ISA::InFmt_VOP_DPP
bankBits : BankedArray , DramGen , HybridGen , NvmGen
bankBitsDram : HybridGen
bankBitsNvm : HybridGen
bankConflictPenalty : LdsState
bankedRegs : GicV2
bankgr : MemInterface::Bank
bankGroupArch : DRAMInterface
bankGroupsPerRank : DRAMInterface
bankId : MemPacket
banks : BankedArray , DRAMInterface::Rank , LdsState , NVMInterface::Rank
banksPerRank : MemInterface
bankType : MipsISA::ISA
BAR0_SIZE_BASE : PciVirtIO
barId : Wavefront
barrier : BaseGlobalEvent , hsa_packet_header_s
barrierBit : QueueContext
barrierEvent : BaseGlobalEvent
BARs : PciDevice
base : ApertureRegister , ArmISA::Memory64 , ArmISA::Memory , ArmISA::RfeOp , ArmISA::SveContigMemSI , ArmISA::SveContigMemSS , ArmISA::SveIndexedMemSV< RegElemType, MemElemType, MicroopType, FirstFaultWritebackMicroopType > , ArmISA::SveIndexedMemVI< RegElemType, MemElemType, MicroopType, FirstFaultWritebackMicroopType > , ArmISA::SveLdStructSI< Element, MicroopLdMemType, MicroopDeIntrlvType > , ArmISA::SveLdStructSS< Element, MicroopLdMemType, MicroopDeIntrlvType > , ArmISA::SveMemPredFillSpill , ArmISA::SveMemVecFillSpill , ArmISA::SveStStructSI< Element, MicroopStMemType, MicroopIntrlvType > , ArmISA::SveStStructSS< Element, MicroopStMemType, MicroopIntrlvType > , ArmISA::SysDC64 , BackingStore , cp::Format , EmbeddedPyBind , Loader::MemoryImage::Segment , TimeBuffer< T > , X86ISA::EmulEnv , X86ISA::I386Process::VSyscallPage , X86ISA::MemOp , X86ISA::X86_64Process::VSyscallPage
base_address : _hsa_queue_s , hsa_queue_s
baseAddr : Gcn3ISA::BufferRsrcDescriptor
baseaddr : Pl111
baseAddr : PrdEntry , Prefetcher::BOP::DelayQueueEntry , Prefetcher::IndirectMemory::IndirectPatternDetectorEntry , Prefetcher::IndirectMemory::PrefetchTableEntry , UFSHostDevice::UFSHCDSGEntry
baseAddr1 : MemTest
baseAddr2 : MemTest
baseCacheStats : SMMUv3BaseCache
baseCpu : ThreadState
baseEntries : X86ISA::IntelMP::ConfigTable
baseFilename : CheckpointIn
baseIsSP : ArmISA::Memory64 , ArmISA::SveContigMemSI , ArmISA::SveContigMemSS , ArmISA::SveMemPredFillSpill , ArmISA::SveMemVecFillSpill
basePC : X86ISA::Decoder
basePointer : HSAQueueDescriptor
BASER_ESZ : Gicv3Its
BASER_INDIRECT : Gicv3Its
BASER_SZ : Gicv3Its
BASER_TYPE : Gicv3Its
BASER_WMASK : Gicv3Its
BASER_WMASK_UNIMPL : Gicv3Its
baseStats : BaseCPU
bb : PowerISA::CondLogicOp
bbMap : SimPoint
bcd : Intel8254Timer , Pl111
bCond : Barrier
bdelayDoneSeqNum : DefaultDecode< Impl >
bebo : Pl111
bebuf_size : tlm::tlm_endian_context
bepo : Pl111
bestOffset : Prefetcher::BOP
bestSandbox : Prefetcher::SBOOE
bestScore : Prefetcher::BOP
bf : PowerISA::CondMoveOp
bfa : PowerISA::CondMoveOp
bgr : Pl111
bi : PowerISA::BranchCond
bias : StatisticalCorrector
bias0 : MultiperspectivePerceptron
bias1 : MultiperspectivePerceptron
biasBank : StatisticalCorrector
biasmostly0 : MultiperspectivePerceptron
biasmostly1 : MultiperspectivePerceptron
biasSK : StatisticalCorrector
big_endian : HDLcd
bigendian : VncInput::PixelFormat
bigPkt : TimingSimpleCPU::SplitFragmentSenderState
bigThumb : ArmISA::Decoder
bimodalAltMatchProviderCorrect : TAGEBase::TAGEBaseStats
bimodalAltMatchProviderWrong : TAGEBase::TAGEBaseStats
bimodalIndex : TAGEBase::BranchInfo
bimodalProviderCorrect : TAGEBase::TAGEBaseStats
bimodalProviderWrong : TAGEBase::TAGEBaseStats
binary : MathExpr::OpSearch
binding : Loader::Symbol
bindingIndex : sc_gem5::Module
bindings : sc_gem5::Port
bindToLoopback : ListenSocket
BitCount : BmpWriter::InfoHeaderV1
bitmask : WaiterState
bits : Compressor::DictionaryCompressor< T >::MaskedPattern< mask > , Compressor::DictionaryCompressor< T >::SignExtendedPattern< N > , MSIXPbaEntry , Set
bitWidth : NetworkLink
blankSpace : cp::Format
blk : CacheBlkPrintWrapper
blkAddr : MSHR::TargetList , QueueEntry
blkMask : BaseTags
blks : BaseSetAssoc , CompressedTags , FALRU , SectorBlk , SectorTags
blkSize : BaseCache , BaseTags , Compressor::Base , FALRU::CacheTracking , MSHR::TargetList , Prefetcher::AccessMapPatternMatching , Prefetcher::Base , QueueEntry , SuperBlk , UFSHostDevice::UFSSCSIDevice
block : FlashDevice::PageMapEntry
blockAddrMask : MemTest
blockBits : DramGen , HybridGen , NvmGen
blockBitsDram : HybridGen
blockBitsNvm : HybridGen
blockCycles : DefaultIEW< Impl >::IEWStats , DefaultRename< Impl >::RenameStats
blocked : BaseCache , BaseCache::CacheResponsePort , Minor::Decode::DecodeThreadInfo , Minor::Fetch1::Fetch1ThreadInfo , Minor::Fetch2::Fetch2ThreadInfo , SimpleCache , SimpleMemobj
blockedByCache : LSQUnit< Impl >::LSQUnitStats
blockedCauses : BaseCache::CacheStats
blockedCycle : BaseCache
blockedCycles : BaseCache::CacheStats , DefaultDecode< Impl >::DecodeStats , DefaultFetch< Impl >::FetchStatGroup
blockedMemInsts : InstructionQueue< Impl >
blockedPacket : SimpleCache::CPUSidePort , SimpleCache::MemSidePort , SimpleMemobj::CPUSidePort , SimpleMemobj::MemSidePort
blockedWaitingResp : BaseTrafficGen
blockEmptyEntries : FlashDevice
blockingRequest : sc_gem5::Gem5ToTlmBridge< BITWIDTH >
blockingResponse : sc_gem5::Gem5ToTlmBridge< BITWIDTH >
blockSize : FlashDevice
blocksize : HybridGen
blockSize : MemTest , MultiperspectivePerceptron , SimpleCache
blocksize : StochasticGen , TraceCPU::FixedRetryGen::TraceElement , TraceGen::TraceElement
blockSizeBits : GarnetSyntheticTraffic
blocksizeDram : HybridGen
blocksizeNvm : HybridGen
blocksPerDisk : FlashDevice
blockThisCycle : DefaultRename< Impl >
blockValidEntries : FlashDevice
blue : BmpWriter::BmpPixel32 , Pixel , PngWriter::PngPixel24 , rgb_t
blue_select : HDLcd
bluemax : VncInput::PixelFormat
blueshift : VncInput::PixelFormat
blurrypath_bits : MultiperspectivePerceptron
blurrypath_histories : MultiperspectivePerceptron::ThreadData
bmidtp : IdeController::Channel::BMIRegs
bmiRegs : IdeController::Channel
bmp : Pl111 , sc_gem5::TlmToGem5Bridge< BITWIDTH >
bMutex : Barrier
bo : PowerISA::BranchCond
bootldr : ArmISA::FsWorkload
bootloader : RiscvISA::BareMetal
bootLoaders : ArmISA::FsWorkload
bootloaderSymtab : RiscvISA::BareMetal
bootReleaseAddr : ArmISA::FsFreebsd
bottomDW : X86ISA::I82094AA
bottomReserved : X86ISA::I82094AA
BOUND_CTRL : Gcn3ISA::InFmt_VOP_DPP
boundaries : FALRU::CacheTracking
bpHistory : BPredUnit::PredictorHistory
bpp : VncInput::PixelFormat
bps : Iris::ThreadContext
bpSpaceIds : FastModel::CortexA76TC , FastModel::CortexR52TC
branchAddr : TimeBufStruct< Impl >::decodeComm
branchCount : TimeBufStruct< Impl >::decodeComm
branches : DefaultCommit< Impl >::CommitStats , DefaultFetch< Impl >::FetchStatGroup
branchInp : Minor::Fetch2
branchInstsIssued : InstructionQueue< Impl >::IQStats
branchMispred : DefaultDecode< Impl >::DecodeStats
branchMispredict : DefaultIEWDefaultCommit< Impl > , TimeBufStruct< Impl >::decodeComm
branchMispredicts : DefaultCommit< Impl >::CommitStats , DefaultIEW< Impl >::IEWStats
branchPC : TAGEBase::BranchInfo
branchPred : BaseSimpleCPU , DefaultFetch< Impl >
branchPredictor : Minor::Fetch2
branchRate : DefaultFetch< Impl >::FetchStatGroup
branchResolved : DefaultDecode< Impl >::DecodeStats
branchTaken : DefaultIEWDefaultCommit< Impl > , TimeBufStruct< Impl >::commitComm , TimeBufStruct< Impl >::decodeComm
brar : dp_regs
brdr : dp_regs
breakCond : Uart8250
breakCont : Uart8250
breakpointEventStreamId : Iris::ThreadContext
bridge : Bridge::BridgeRequestPort , Bridge::BridgeResponsePort , sc_gem5::Gem5ToTlmBridge< BITWIDTH >::BridgeResponsePort , sc_gem5::TlmToGem5Bridge< BITWIDTH >::BridgeRequestPort
bridgeResponsePort : sc_gem5::Gem5ToTlmBridge< BITWIDTH >
bSS : ArmISA::SoftwareStep
bStep : ArmISA::ArmFault
bt : PowerISA::CondLogicOp
btableHysteresis : TAGEBase
btablePrediction : TAGEBase
BTB : BPredUnit
btb : DefaultBTB
BTBHitRatio : BPredUnit::BPredUnitStats
BTBHits : BPredUnit::BPredUnitStats
BTBLookups : BPredUnit::BPredUnitStats
btp : ReplacementPolicy::BIP , ReplacementPolicy::BRRIP
bubbleFlag : Minor::ForwardLineData
bubbleInst : Minor::MinorDynInst
bucket_size : Stats::DistData , Stats::DistStor , Stats::DistStor::Params , Stats::HistStor
buckets : Stats::DistStor::Params , Stats::HistStor::Params
budgetbits : MultiperspectivePerceptron
buf : BaseDynInst< Impl >::Regs , Fifo< T > , iGbReg::RxDesc , RegisterBankTest , RegisterBufTest , RegisterRaoTest , RegisterRazTest , sc_gem5::UniqueNameGen , Trace::InstPBTrace , Trace::TarmacParserRecord , TypedRegisterTest
buf_size_in_bytes : kfd_ioctl_dbg_address_watch_args , kfd_ioctl_dbg_wave_control_args
bufEnd : FetchUnit::FetchBufDesc
buff_per_vc : FaultModel::system_conf
buffer : CircleBuf< T > , ConstProxyPtr< T, Proxy > , DmaReadFifo , EtherTapBase , GoodbyeObject , Minor::Latch< Data > , RegisterBank< BankByteOrder >::RegisterLBuf< BufBytes > , TimeBuffer< T >::wire , tlm::tlm_fifo< T > , UFSHostDevice::transferInfo
buffer_size : Pl111
buffer_used : EtherTapStub
bufferBits : NvmGen
bufferedPCs : FetchUnit::FetchBufDesc
bufferram : ArmLinux32::tgt_sysinfo , ArmLinux64::tgt_sysinfo , MipsLinux::tgt_sysinfo , RiscvLinux32::tgt_sysinfo , RiscvLinux64::tgt_sysinfo , Sparc32Linux::tgt_sysinfo , SparcLinux::tgt_sysinfo , X86Linux32::tgt_sysinfo , X86Linux64::tgt_sysinfo
bufferSize : GoodbyeObject , NvmGen , TAGEBase::FoldedHistory
bufferSizeNvm : HybridGen
bufferUsed : GoodbyeObject
buflen : EtherTapBase
bufLength : EthPacketData
BufOffset : RegisterRaoTest , RegisterRazTest
bufPtr : BaseBufferArg
bufptr : ns_desc32 , ns_desc64
BufSize : RegisterRaoTest , RegisterRazTest
bufSize : Trace::InstPBTrace
bufStart : FetchUnit::FetchBufDesc
bulky : AMDKernelCode
burst_len : HDLcd
burstCount : BurstHelper
burstHelper : MemPacket
burstInterleave : DRAMInterface
burstSize : MemInterface
burstsPerRowBuffer : MemInterface
burstsPerStripe : MemInterface
burstsServiced : BurstHelper
burstTicks : MemCtrl
bus : PciBusAddr
bus_options : HDLcd
BUS_OPTIONS_RESETV : HDLcd
busAddr : PciHost::DeviceInterface
busID : X86ISA::IntelMP::AddrSpaceMapping , X86ISA::IntelMP::Bus , X86ISA::IntelMP::BusHierarchy , X86ISA::IntelMP::CompatAddrSpaceMod
busState : QoS::MemCtrl
busStateNext : QoS::MemCtrl
busType : X86ISA::IntelMP::Bus
busUtil : DRAMInterface::DRAMStats , NVMInterface::NVMStats
busUtilRead : DRAMInterface::DRAMStats , NVMInterface::NVMStats
busUtilWrite : DRAMInterface::DRAMStats , NVMInterface::NVMStats
busy : CopyEngine::CopyEngineChannel , Iob::IntBusy , RegisterFile , sc_core::sc_event_and_list , sc_core::sc_event_or_list , SMMUCommandExecProcess
busyBanks : BankedArray
button_mask : VncInput::PointerEventMessage
bwgehl : StatisticalCorrector
bwHist : StatisticalCorrector::SCThreadHistory
bwID : MultiSocketSimpleSwitchAT::ConnectionInfo
bwInstRead : AbstractMemory::MemStats
bwm : StatisticalCorrector
bwnb : StatisticalCorrector
bwRead : AbstractMemory::MemStats
bwTotal : AbstractMemory::MemStats
bwWrite : AbstractMemory::MemStats
bypassLineAddress : HDLcd
byte_enable : tlm::tlm_endian_context
byte_order : PixelConverter
byte_trackers : MemChecker
byteCount : PrdEntry , WriteAllocator
byteMask : MsrBase
byteOrder : ArmFreebsd , ArmLinux , Linux::ThreadInfo , MipsLinux , PowerLinux , Prefetcher::IndirectMemory , RiscvLinux , SimpleUart , SparcLinux , SparcSolaris , VirtDescriptor , VirtIODeviceBase , VirtQueue , VirtQueue::VirtRing< T > , X86Linux
bytes : Compressor::DictionaryCompressor< T >::DeltaPattern< DeltaSizeBits >
bytes_completed : DMARequest
bytes_copied : kfd_ioctl_cross_memory_copy_args
bytes_issued : DMARequest
bytes_per_pixel : HDLcd
bytesAccessed : MemInterface::Bank
bytesAllocated : LdsState
bytesCopied : CopyEngine::CopyEngineStats , IGbE::RxDescCache
bytesInstRead : AbstractMemory::MemStats
bytesPerActivate : DRAMInterface::DRAMStats
bytesPerBank : NVMInterface::NVMStats
bytesPerPixel : Pl111
bytesRead : AbstractMemory::MemStats , BaseTrafficGen::StatGroup , DRAMInterface::DRAMStats , NVMInterface::NVMStats
bytesReadSys : MemCtrl::CtrlStats
bytesReadWrQ : MemCtrl::CtrlStats
bytesValid : Packet
bytesWritten : AbstractMemory::MemStats , BaseTrafficGen::StatGroup , DRAMInterface::DRAMStats , NVMInterface::NVMStats
bytesWrittenSys : MemCtrl::CtrlStats
ByteSz : LaneData< LS >
ByteTable : X86ISA::Decoder