gem5  v21.1.0.0
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ide_ctrl.hh File Reference
#include "base/bitunion.hh"
#include "dev/io_device.hh"
#include "dev/pci/device.hh"
#include "dev/reg_bank.hh"
#include "params/IdeController.hh"

Go to the source code of this file.

Classes

class  gem5::IdeController
 Device model for an Intel PIIX4 IDE controller. More...
 
struct  gem5::IdeController::Channel
 
struct  gem5::IdeController::Channel::BMIRegs
 Registers used for bus master interface. More...
 

Namespaces

 gem5
 Reference material can be found at the JEDEC website: UFS standard http://www.jedec.org/standards-documents/results/jesd220 UFS HCI specification http://www.jedec.org/standards-documents/results/jesd223.
 

Detailed Description

Simple PCI IDE controller with bus mastering capability and UDMA modeled after controller in the Intel PIIX4 chip

Definition in file ide_ctrl.hh.


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