| activate()=0 | gem5::ThreadContext | pure virtual |
| Active enum value | gem5::ThreadContext | |
| clearArchRegs()=0 | gem5::ThreadContext | pure virtual |
| compare(ThreadContext *one, ThreadContext *two) | gem5::ThreadContext | static |
| contextId() const =0 | gem5::ThreadContext | pure virtual |
| copyArchRegs(ThreadContext *tc)=0 | gem5::ThreadContext | pure virtual |
| cpuId() const =0 | gem5::ThreadContext | pure virtual |
| DefaultFloatResult | gem5::ThreadContext | static |
| DefaultIntResult | gem5::ThreadContext | static |
| descheduleInstCountEvent(Event *event)=0 | gem5::ThreadContext | pure virtual |
| exit() | gem5::ThreadContext | inlinevirtual |
| flattenRegId(const RegId ®_id) const =0 | gem5::ThreadContext | pure virtual |
| floatResult | gem5::ThreadContext | |
| floats | gem5::ThreadContext | static |
| getCheckerCpuPtr()=0 | gem5::ThreadContext | pure virtual |
| getCpuPtr()=0 | gem5::ThreadContext | pure virtual |
| getCurrentInstCount()=0 | gem5::ThreadContext | pure virtual |
| getDecoderPtr()=0 | gem5::ThreadContext | pure virtual |
| getHtmCheckpointPtr()=0 | gem5::ThreadContext | pure virtual |
| getIsaPtr()=0 | gem5::ThreadContext | pure virtual |
| getMMUPtr()=0 | gem5::ThreadContext | pure virtual |
| getProcessPtr()=0 | gem5::ThreadContext | pure virtual |
| getSystemPtr()=0 | gem5::ThreadContext | pure virtual |
| getUseForClone() | gem5::ThreadContext | inline |
| getVirtProxy()=0 | gem5::ThreadContext | pure virtual |
| getWritableVecPredReg(const RegId ®)=0 | gem5::ThreadContext | pure virtual |
| getWritableVecPredRegFlat(RegIndex idx)=0 | gem5::ThreadContext | pure virtual |
| getWritableVecReg(const RegId ®)=0 | gem5::ThreadContext | pure virtual |
| getWritableVecRegFlat(RegIndex idx)=0 | gem5::ThreadContext | pure virtual |
| halt()=0 | gem5::ThreadContext | pure virtual |
| Halted enum value | gem5::ThreadContext | |
| Halting enum value | gem5::ThreadContext | |
| htmAbortTransaction(uint64_t htm_uid, HtmFailureFaultCause cause)=0 | gem5::ThreadContext | pure virtual |
| initMemProxies(ThreadContext *tc)=0 | gem5::ThreadContext | pure virtual |
| instAddr() const =0 | gem5::ThreadContext | pure virtual |
| intOffset | gem5::ThreadContext | |
| intResult | gem5::ThreadContext | |
| ints | gem5::ThreadContext | static |
| microPC() const =0 | gem5::ThreadContext | pure virtual |
| nextInstAddr() const =0 | gem5::ThreadContext | pure virtual |
| pcState() const =0 | gem5::ThreadContext | pure virtual |
| pcState(const TheISA::PCState &val)=0 | gem5::ThreadContext | pure virtual |
| pcStateNoRecord(const TheISA::PCState &val)=0 | gem5::ThreadContext | pure virtual |
| quiesce() | gem5::ThreadContext | |
| quiesceTick(Tick resume) | gem5::ThreadContext | |
| readCCReg(RegIndex reg_idx) const =0 | gem5::ThreadContext | pure virtual |
| readCCRegFlat(RegIndex idx) const =0 | gem5::ThreadContext | pure virtual |
| readFloatReg(RegIndex reg_idx) const =0 | gem5::ThreadContext | pure virtual |
| readFloatRegFlat(RegIndex idx) const =0 | gem5::ThreadContext | pure virtual |
| readIntReg(RegIndex reg_idx) const =0 | gem5::ThreadContext | pure virtual |
| readIntRegFlat(RegIndex idx) const =0 | gem5::ThreadContext | pure virtual |
| readLastActivate()=0 | gem5::ThreadContext | pure virtual |
| readLastSuspend()=0 | gem5::ThreadContext | pure virtual |
| readMiscReg(RegIndex misc_reg)=0 | gem5::ThreadContext | pure virtual |
| readMiscRegNoEffect(RegIndex misc_reg) const =0 | gem5::ThreadContext | pure virtual |
| readStCondFailures() const =0 | gem5::ThreadContext | pure virtual |
| readVecElem(const RegId ®) const =0 | gem5::ThreadContext | pure virtual |
| readVecElemFlat(RegIndex idx, const ElemIndex &elem_idx) const =0 | gem5::ThreadContext | pure virtual |
| readVecPredReg(const RegId ®) const =0 | gem5::ThreadContext | pure virtual |
| readVecPredRegFlat(RegIndex idx) const =0 | gem5::ThreadContext | pure virtual |
| readVecReg(const RegId ®) const =0 | gem5::ThreadContext | pure virtual |
| readVecRegFlat(RegIndex idx) const =0 | gem5::ThreadContext | pure virtual |
| regStats(const std::string &name) | gem5::ThreadContext | inlinevirtual |
| remove(PCEvent *event)=0 | gem5::PCEventScope | pure virtual |
| schedule(PCEvent *event)=0 | gem5::PCEventScope | pure virtual |
| scheduleInstCountEvent(Event *event, Tick count)=0 | gem5::ThreadContext | pure virtual |
| sendFunctional(PacketPtr pkt) | gem5::ThreadContext | virtual |
| setCCReg(RegIndex reg_idx, RegVal val)=0 | gem5::ThreadContext | pure virtual |
| setCCRegFlat(RegIndex idx, RegVal val)=0 | gem5::ThreadContext | pure virtual |
| setContextId(ContextID id)=0 | gem5::ThreadContext | pure virtual |
| setFloatReg(RegIndex reg_idx, RegVal val)=0 | gem5::ThreadContext | pure virtual |
| setFloatRegFlat(RegIndex idx, RegVal val)=0 | gem5::ThreadContext | pure virtual |
| setHtmCheckpointPtr(BaseHTMCheckpointPtr cpt)=0 | gem5::ThreadContext | pure virtual |
| setIntReg(RegIndex reg_idx, RegVal val)=0 | gem5::ThreadContext | pure virtual |
| setIntRegFlat(RegIndex idx, RegVal val)=0 | gem5::ThreadContext | pure virtual |
| setMiscReg(RegIndex misc_reg, RegVal val)=0 | gem5::ThreadContext | pure virtual |
| setMiscRegNoEffect(RegIndex misc_reg, RegVal val)=0 | gem5::ThreadContext | pure virtual |
| setNPC(Addr val) | gem5::ThreadContext | inline |
| setProcessPtr(Process *p)=0 | gem5::ThreadContext | pure virtual |
| setStatus(Status new_status)=0 | gem5::ThreadContext | pure virtual |
| setStCondFailures(unsigned sc_failures)=0 | gem5::ThreadContext | pure virtual |
| setThreadId(int id)=0 | gem5::ThreadContext | pure virtual |
| setUseForClone(bool new_val) | gem5::ThreadContext | inline |
| setVecElem(const RegId ®, const TheISA::VecElem &val)=0 | gem5::ThreadContext | pure virtual |
| setVecElemFlat(RegIndex idx, const ElemIndex &elem_idx, const TheISA::VecElem &val)=0 | gem5::ThreadContext | pure virtual |
| setVecPredReg(const RegId ®, const TheISA::VecPredRegContainer &val)=0 | gem5::ThreadContext | pure virtual |
| setVecPredRegFlat(RegIndex idx, const TheISA::VecPredRegContainer &val)=0 | gem5::ThreadContext | pure virtual |
| setVecReg(const RegId ®, const TheISA::VecRegContainer &val)=0 | gem5::ThreadContext | pure virtual |
| setVecRegFlat(RegIndex idx, const TheISA::VecRegContainer &val)=0 | gem5::ThreadContext | pure virtual |
| socketId() const =0 | gem5::ThreadContext | pure virtual |
| Status enum name | gem5::ThreadContext | |
| status() const =0 | gem5::ThreadContext | pure virtual |
| suspend()=0 | gem5::ThreadContext | pure virtual |
| Suspended enum value | gem5::ThreadContext | |
| takeOverFrom(ThreadContext *old_context)=0 | gem5::ThreadContext | pure virtual |
| threadId() const =0 | gem5::ThreadContext | pure virtual |
| useForClone | gem5::ThreadContext | protected |
| ~ThreadContext() | gem5::ThreadContext | inlinevirtual |
