gic_v2m.cc File Reference

Implementiation of a GICv2m MSI shim. More...

#include "dev/arm/gic_v2m.hh"
#include "base/bitunion.hh"
#include "base/intmath.hh"
#include "debug/Checkpoint.hh"
#include "debug/GICV2M.hh"
#include "dev/io_device.hh"
#include "mem/packet.hh"
#include "mem/packet_access.hh"

Go to the source code of this file.

Namespaces
namespace	gem5
	Reference material can be found at the JEDEC website: UFS standard http://www.jedec.org/standards-documents/results/jesd220 UFS HCI specification http://www.jedec.org/standards-documents/results/jesd223.

Detailed Description

Implementiation of a GICv2m MSI shim.

This shim adds MSI support to GICv2.

This should be instantiated with the appropriate number of frames, and SPI numbers thereof, to the system being modelled.

For example, in RealView.py (or whichever board setup is used), instantiate:

gicv2m = Gicv2m(frames=[ Gicv2mFrame(addr=0x12340000, spi_base=320, spi_len=64), Gicv2mFrame(addr=0x12350000, spi_base=100, spi_len=32), Gicv2mFrame(addr=0x12360000, spi_base=150, spi_len=16), Gicv2mFrame(addr=0x12370000, spi_base=190, spi_len=8), ])

Definition in file gic_v2m.cc.