macromem.hh File Reference

#include "arch/arm/insts/pred_inst.hh"
#include "arch/arm/pcstate.hh"
#include "arch/arm/tlb.hh"
#include "cpu/thread_context.hh"

Go to the source code of this file.

Classes
class	gem5::ArmISA::MicroOp
	Base class for Memory microops. More...
class	gem5::ArmISA::MicroOpX
class	gem5::ArmISA::MicroNeonMemOp
	Microops for Neon loads/stores. More...
class	gem5::ArmISA::MicroNeonMixOp
	Microops for Neon load/store (de)interleaving. More...
class	gem5::ArmISA::MicroNeonMixLaneOp
class	gem5::ArmISA::MicroNeonMixOp64
	Microops for AArch64 NEON load/store (de)interleaving. More...
class	gem5::ArmISA::MicroNeonMixLaneOp64
class	gem5::ArmISA::VldMultOp64
	Base classes for microcoded AArch64 NEON memory instructions. More...
class	gem5::ArmISA::VstMultOp64
class	gem5::ArmISA::VldSingleOp64
class	gem5::ArmISA::VstSingleOp64
class	gem5::ArmISA::MicroSetPCCPSR
	Microops of the form PC = IntRegA CPSR = IntRegB. More...
class	gem5::ArmISA::MicroIntMov
	Microops of the form IntRegA = IntRegB. More...
class	gem5::ArmISA::MicroIntImmOp
	Microops of the form IntRegA = IntRegB op Imm. More...
class	gem5::ArmISA::MicroIntImmXOp
class	gem5::ArmISA::MicroIntOp
	Microops of the form IntRegA = IntRegB op IntRegC. More...
class	gem5::ArmISA::MicroIntRegXOp
class	gem5::ArmISA::MicroIntRegOp
	Microops of the form IntRegA = IntRegB op shifted IntRegC. More...
class	gem5::ArmISA::MicroMemOp
	Memory microops which use IntReg + Imm addressing. More...
class	gem5::ArmISA::MicroMemPairOp
class	gem5::ArmISA::MacroMemOp
	Base class for microcoded integer memory instructions. More...
class	gem5::ArmISA::PairMemOp
	Base class for pair load/store instructions. More...
class	gem5::ArmISA::BigFpMemImmOp
class	gem5::ArmISA::BigFpMemPostOp
class	gem5::ArmISA::BigFpMemPreOp
class	gem5::ArmISA::BigFpMemRegOp
class	gem5::ArmISA::BigFpMemLitOp
class	gem5::ArmISA::VldMultOp
	Base classes for microcoded integer memory instructions. More...
class	gem5::ArmISA::VldSingleOp
class	gem5::ArmISA::VstMultOp
	Base class for microcoded integer memory instructions. More...
class	gem5::ArmISA::VstSingleOp
class	gem5::ArmISA::MacroVFPMemOp
	Base class for microcoded floating point memory instructions. More...

Namespaces
namespace	gem5
	Reference material can be found at the JEDEC website: UFS standard http://www.jedec.org/standards-documents/results/jesd220 UFS HCI specification http://www.jedec.org/standards-documents/results/jesd223.
namespace	gem5::ArmISA

Functions
static unsigned int	gem5::ArmISA::number_of_ones (int32_t val)