gem5 v23.0.0.1
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#include "arch/x86/isa.hh"
#include "arch/x86/decoder.hh"
#include "arch/x86/mmu.hh"
#include "arch/x86/regs/ccr.hh"
#include "arch/x86/regs/float.hh"
#include "arch/x86/regs/int.hh"
#include "arch/x86/regs/misc.hh"
#include "base/compiler.hh"
#include "cpu/base.hh"
#include "cpu/thread_context.hh"
#include "debug/MatRegs.hh"
#include "params/X86ISA.hh"
#include "sim/serialize.hh"
Go to the source code of this file.
Namespaces | |
namespace | gem5 |
Reference material can be found at the JEDEC website: UFS standard http://www.jedec.org/standards-documents/results/jesd220 UFS HCI specification http://www.jedec.org/standards-documents/results/jesd223. | |
namespace | gem5::X86ISA |
This is exposed globally, independent of the ISA. | |
Functions | |
static void | gem5::X86ISA::copyMiscRegs (ThreadContext *src, ThreadContext *dest) |