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WriteMask.hh
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1/*
2 * Copyright (c) 2020,2021 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2012-15 Advanced Micro Devices, Inc.
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 */
40
41#ifndef __MEM_RUBY_COMMON_WRITEMASK_HH__
42#define __MEM_RUBY_COMMON_WRITEMASK_HH__
43
44#include <cassert>
45#include <iomanip>
46#include <iostream>
47#include <vector>
48
49#include "base/amo.hh"
50#include "base/intmath.hh"
53
54namespace gem5
55{
56
57namespace ruby
58{
59
61{
62 public:
64
65 WriteMask();
66
67 WriteMask(int size)
68 : mSize(size), mMask(size, false), mAtomic(false)
69 {}
70
72 : mSize(size), mMask(mask), mAtomic(false)
73 {}
74
76 : mSize(size), mMask(mask), mAtomic(true), mAtomicOp(atomicOp)
77 {}
78
80 {}
81
82 int getBlockSize() const { return mSize; }
83 void
84 setBlockSize(int size)
85 {
86 // This should only be used once if the default ctor was used. Probably
87 // by src/mem/ruby/protocol/RubySlicc_MemControl.sm.
88 assert(mSize == 0);
89 assert(size > 0);
90 mSize = size;
91 clear();
92 }
93 int getBlockSizeBits() const { return floorLog2(mSize); }
94
95 void
97 {
99 }
100
101 bool
102 test(int offset) const
103 {
104 assert(mSize > 0);
105 assert(offset < mSize);
106 return mMask[offset];
107 }
108
109 void
110 setMask(int offset, int len, bool val = true)
111 {
112 assert(mSize > 0);
113 assert(mSize >= (offset + len));
114 for (int i = 0; i < len; i++) {
115 mMask[offset + i] = val;
116 }
117 }
118 void
120 {
121 assert(mSize > 0);
122 for (int i = 0; i < mSize; i++) {
123 mMask[i] = true;
124 }
125 }
126
127 bool
128 getMask(int offset, int len) const
129 {
130 bool tmp = true;
131 assert(mSize > 0);
132 assert(mSize >= (offset + len));
133 for (int i = 0; i < len; i++) {
134 tmp = tmp & mMask.at(offset + i);
135 }
136 return tmp;
137 }
138
139 bool
140 isOverlap(const WriteMask &readMask) const
141 {
142 bool tmp = false;
143 assert(mSize > 0);
144 assert(mSize == readMask.mSize);
145 for (int i = 0; i < mSize; i++) {
146 if (readMask.mMask.at(i)) {
147 tmp = tmp | mMask.at(i);
148 }
149 }
150 return tmp;
151 }
152
153 bool
154 containsMask(const WriteMask &readMask) const
155 {
156 bool tmp = true;
157 assert(mSize > 0);
158 assert(mSize == readMask.mSize);
159 for (int i = 0; i < mSize; i++) {
160 if (readMask.mMask.at(i)) {
161 tmp = tmp & mMask.at(i);
162 }
163 }
164 return tmp;
165 }
166
167 bool isEmpty() const
168 {
169 assert(mSize > 0);
170 for (int i = 0; i < mSize; i++) {
171 if (mMask.at(i)) {
172 return false;
173 }
174 }
175 return true;
176 }
177
178 bool
179 isFull() const
180 {
181 assert(mSize > 0);
182 for (int i = 0; i < mSize; i++) {
183 if (!mMask.at(i)) {
184 return false;
185 }
186 }
187 return true;
188 }
189
190 void
191 andMask(const WriteMask & writeMask)
192 {
193 assert(mSize > 0);
194 assert(mSize == writeMask.mSize);
195 for (int i = 0; i < mSize; i++) {
196 mMask[i] = (mMask.at(i)) && (writeMask.mMask.at(i));
197 }
198
199 if (writeMask.mAtomic) {
200 mAtomic = true;
201 mAtomicOp = writeMask.mAtomicOp;
202 }
203 }
204
205 void
206 orMask(const WriteMask & writeMask)
207 {
208 assert(mSize > 0);
209 assert(mSize == writeMask.mSize);
210 for (int i = 0; i < mSize; i++) {
211 mMask[i] = (mMask.at(i)) || (writeMask.mMask.at(i));
212 }
213
214 if (writeMask.mAtomic) {
215 mAtomic = true;
216 mAtomicOp = writeMask.mAtomicOp;
217 }
218 }
219
220 void
221 setInvertedMask(const WriteMask & writeMask)
222 {
223 assert(mSize > 0);
224 assert(mSize == writeMask.mSize);
225 for (int i = 0; i < mSize; i++) {
226 mMask[i] = !writeMask.mMask.at(i);
227 }
228 }
229
230 int
231 firstBitSet(bool val, int offset = 0) const
232 {
233 assert(mSize > 0);
234 for (int i = offset; i < mSize; ++i)
235 if (mMask[i] == val)
236 return i;
237 return mSize;
238 }
239
240 int
241 count(int offset = 0) const
242 {
243 assert(mSize > 0);
244 int count = 0;
245 for (int i = offset; i < mSize; ++i)
246 count += mMask[i];
247 return count;
248 }
249
250 void print(std::ostream& out) const;
251
252 /*
253 * Performs atomic operations on the data block pointed to by p. The
254 * atomic operations to perform are in the vector mAtomicOp. The
255 * effect of each atomic operation is pushed to the atomicChangeLog
256 * so that each individual atomic requestor may see the results of their
257 * specific atomic operation.
258 */
259 void performAtomic(uint8_t * p,
260 std::deque<uint8_t*>& atomicChangeLog,
261 bool isAtomicNoReturn=true) const;
262
263 const AtomicOpVector&
265 {
266 return mAtomicOp;
267 }
268
269 void
270 setAtomicOps(const AtomicOpVector& atomicOps)
271 {
272 mAtomic = true;
273 mAtomicOp = std::move(atomicOps);
274 }
275
276 private:
277 int mSize;
281};
282
283inline std::ostream&
284operator<<(std::ostream& out, const WriteMask& obj)
285{
286 obj.print(out);
287 out << std::flush;
288 return out;
289}
290
291} // namespace ruby
292} // namespace gem5
293
294#endif // __MEM_RUBY_COMMON_WRITEMASK_HH__
bool isFull() const
Definition WriteMask.hh:179
bool isEmpty() const
Definition WriteMask.hh:167
void performAtomic(uint8_t *p, std::deque< uint8_t * > &atomicChangeLog, bool isAtomicNoReturn=true) const
Definition WriteMask.cc:59
bool getMask(int offset, int len) const
Definition WriteMask.hh:128
bool isOverlap(const WriteMask &readMask) const
Definition WriteMask.hh:140
AtomicOpVector mAtomicOp
Definition WriteMask.hh:280
std::vector< std::pair< int, AtomicOpFunctor * > > AtomicOpVector
Definition WriteMask.hh:63
bool containsMask(const WriteMask &readMask) const
Definition WriteMask.hh:154
int count(int offset=0) const
Definition WriteMask.hh:241
void setMask(int offset, int len, bool val=true)
Definition WriteMask.hh:110
std::vector< bool > mMask
Definition WriteMask.hh:278
WriteMask(int size, std::vector< bool > &mask, AtomicOpVector atomicOp)
Definition WriteMask.hh:75
void setInvertedMask(const WriteMask &writeMask)
Definition WriteMask.hh:221
bool test(int offset) const
Definition WriteMask.hh:102
void orMask(const WriteMask &writeMask)
Definition WriteMask.hh:206
const AtomicOpVector & getAtomicOps() const
Definition WriteMask.hh:264
int getBlockSize() const
Definition WriteMask.hh:82
WriteMask(int size, std::vector< bool > &mask)
Definition WriteMask.hh:71
int getBlockSizeBits() const
Definition WriteMask.hh:93
void print(std::ostream &out) const
Definition WriteMask.cc:46
void setBlockSize(int size)
Definition WriteMask.hh:84
void andMask(const WriteMask &writeMask)
Definition WriteMask.hh:191
void setAtomicOps(const AtomicOpVector &atomicOps)
Definition WriteMask.hh:270
int firstBitSet(bool val, int offset=0) const
Definition WriteMask.hh:231
STL deque class.
Definition stl.hh:44
STL vector class.
Definition stl.hh:37
static constexpr std::enable_if_t< std::is_integral_v< T >, int > floorLog2(T x)
Definition intmath.hh:59
Bitfield< 3, 0 > mask
Definition pcstate.hh:63
Bitfield< 18, 16 > len
Bitfield< 7 > i
Definition misc_types.hh:67
Bitfield< 23, 0 > offset
Definition types.hh:144
Bitfield< 0 > p
Bitfield< 63 > val
Definition misc.hh:804
std::ostream & operator<<(std::ostream &os, const BoolVec &myvector)
Definition BoolVec.cc:49
Copyright (c) 2024 Arm Limited All rights reserved.
Definition binary32.hh:36

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