gem5 [DEVELOP-FOR-25.1]
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amdgpu_smu.cc
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1/*
2 * Copyright (c) 2025 Advanced Micro Devices, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
10 *
11 * 2. Redistributions in binary form must reproduce the above copyright notice,
12 * this list of conditions and the following disclaimer in the documentation
13 * and/or other materials provided with the distribution.
14 *
15 * 3. Neither the name of the copyright holder nor the names of its
16 * contributors may be used to endorse or promote products derived from this
17 * software without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
33
34#include "debug/AMDGPUDevice.hh"
36#include "mem/packet_access.hh"
37
38namespace gem5
39{
40
41void
43{
44 uint32_t regval = 0;
45
46 switch (offset) {
48 regval = (gpuDevice->getGpuId() << 4);
49 break;
50 default:
51 DPRINTF(AMDGPUDevice, "SMU read of unknown MMIO offset %x (%x)\n",
52 offset, pkt->getAddr());
53 break;
54 }
55
56 pkt->setLE<uint32_t>(regval);
57
58 DPRINTF(AMDGPUDevice, "SMU read MMIO offset %x (%x): %x\n", offset,
59 pkt->getAddr(), pkt->getLE<uint32_t>());
60}
61
62void
64{
65 switch (offset) {
66 default:
67 DPRINTF(AMDGPUDevice, "SMU write of unknown MMIO offset %x (%x)\n",
68 offset, pkt->getAddr());
69 }
70}
71
72void
74{
75 gpuDevice = gpu_device;
76}
77
78} // namespace gem5
#define MI200_SMUIO_MCM_CONFIG
Definition amdgpu_smu.hh:42
#define DPRINTF(x,...)
Definition trace.hh:209
Device model for an AMD GPU.
void setGPUDevice(AMDGPUDevice *gpu_device)
Definition amdgpu_smu.cc:73
void writeMMIO(PacketPtr pkt, Addr offset)
Definition amdgpu_smu.cc:63
void readMMIO(PacketPtr pkt, Addr offset)
Definition amdgpu_smu.cc:42
AMDGPUDevice * gpuDevice
Definition amdgpu_smu.hh:58
Addr getAddr() const
Definition packet.hh:807
void setLE(T v)
Set the value in the data pointer to v as little endian.
T getLE() const
Get the data in the packet byte swapped from little endian to host endian.
Bitfield< 23, 0 > offset
Definition types.hh:144
Copyright (c) 2024 Arm Limited All rights reserved.
Definition binary32.hh:36
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition types.hh:147
Packet * PacketPtr

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