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process.hh
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1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 */
37
38#ifndef __ARCH_X86_PROCESS_HH__
39#define __ARCH_X86_PROCESS_HH__
40
41#include <string>
42#include <vector>
43
44#include "arch/x86/pagetable.hh"
46#include "sim/aux_vector.hh"
47#include "sim/process.hh"
48
49namespace gem5
50{
51
52class SyscallDesc;
53
54namespace X86ISA
55{
56 namespace auxv
57 {
58
64
65 } // namespace auxv
66
67 class X86Process : public Process
68 {
69 protected:
72
73 X86Process(const ProcessParams &params, loader::ObjectFile *objFile);
74
75 template<class IntType>
76 void argsInit(int pageSize,
78
79 public:
80 Addr gdtStart() const { return _gdtStart; }
81 Addr gdtSize() const { return _gdtSize; }
82
83 void clone(ThreadContext *old_tc, ThreadContext *new_tc,
84 Process *process, RegVal flags) override;
85
88 {
89 if (this == &in)
90 return *this;
91
93 _gdtSize = in._gdtSize;
94
95 return *this;
96 }
97 };
98
100 {
101 protected:
103 {
104 public:
109
112 {
113 if (this == &in)
114 return *this;
115
116 base = in.base;
117 size = in.size;
120
121 return *this;
122 }
123 };
125
126 public:
127 X86_64Process(const ProcessParams &params,
129
130 void argsInit(int pageSize);
131 void initState() override;
132
133 void clone(ThreadContext *old_tc, ThreadContext *new_tc,
134 Process *process, RegVal flags) override;
135 };
136
137 class I386Process : public X86Process
138 {
139 protected:
141 {
142 public:
147
150 {
151 if (this == &in)
152 return *this;
153
154 base = in.base;
155 size = in.size;
158
159 return *this;
160 }
161 };
163
164 public:
165 I386Process(const ProcessParams &params,
167
168 const VSyscallPage &getVSyscallPage() const { return vsyscallPage; }
169
170 void argsInit(int pageSize);
171 void initState() override;
172
173 void clone(ThreadContext *old_tc, ThreadContext *new_tc,
174 Process *process, RegVal flags) override;
175 };
176
177} // namespace X86ISA
178} // namespace gem5
179
180#endif // __ARCH_X86_PROCESS_HH__
Process(const ProcessParams &params, EmulationPageTable *pTable, loader::ObjectFile *obj_file)
Definition process.cc:113
loader::ObjectFile * objFile
Definition process.hh:235
This class provides the wrapper interface for the system call implementations which are defined in th...
ThreadContext is the external interface to all thread state for anything outside of the CPU.
VSyscallPage & operator=(const VSyscallPage &in)
Definition process.hh:149
void clone(ThreadContext *old_tc, ThreadContext *new_tc, Process *process, RegVal flags) override
Definition process.cc:1075
VSyscallPage vsyscallPage
Definition process.hh:162
I386Process(const ProcessParams &params, loader::ObjectFile *objFile)
Definition process.cc:125
void argsInit(int pageSize)
Definition process.cc:1056
const VSyscallPage & getVSyscallPage() const
Definition process.hh:168
void initState() override
initState() is called on each SimObject when not restoring from a checkpoint.
Definition process.cc:638
void clone(ThreadContext *old_tc, ThreadContext *new_tc, Process *process, RegVal flags) override
Definition process.cc:96
Addr gdtStart() const
Definition process.hh:80
void argsInit(int pageSize, std::vector< gem5::auxv::AuxVector< IntType > > extraAuxvs)
Definition process.cc:763
X86Process & operator=(const X86Process &in)
Definition process.hh:87
Addr gdtSize() const
Definition process.hh:81
X86Process(const ProcessParams &params, loader::ObjectFile *objFile)
Definition process.cc:84
VSyscallPage & operator=(const VSyscallPage &in)
Definition process.hh:111
void initState() override
initState() is called on each SimObject when not restoring from a checkpoint.
Definition process.cc:152
void clone(ThreadContext *old_tc, ThreadContext *new_tc, Process *process, RegVal flags) override
Definition process.cc:1067
X86_64Process(const ProcessParams &params, loader::ObjectFile *objFile)
Definition process.cc:104
void argsInit(int pageSize)
Definition process.cc:1048
STL vector class.
Definition stl.hh:37
const Params & params() const
Declaration of a multi-level page table.
This is exposed globally, independent of the ISA.
Definition tlb.cc:65
Copyright (c) 2024 Arm Limited All rights reserved.
Definition binary32.hh:36
uint64_t RegVal
Definition types.hh:173
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition types.hh:147

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