base_gic.hh

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/*
 * Copyright (c) 2012-2013, 2017-2018, 2021 Arm Limited
 * All rights reserved
 *
 * The license below extends only to copyright in the software and shall
 * not be construed as granting a license to any other intellectual
 * property including but not limited to intellectual property relating
 * to a hardware implementation of the functionality of the software
 * licensed hereunder.  You may use the software subject to the license
 * terms below provided that you ensure that this notice is replicated
 * unmodified and in its entirety in all distributions of the software,
 * modified or unmodified, in source code or in binary form.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met: redistributions of source code must retain the above copyright
 * notice, this list of conditions and the following disclaimer;
 * redistributions in binary form must reproduce the above copyright
 * notice, this list of conditions and the following disclaimer in the
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 * neither the name of the copyright holders nor the names of its
 * contributors may be used to endorse or promote products derived from
 * this software without specific prior written permission.
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 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

 
#ifndef __DEV_ARM_BASE_GIC_H__
#define __DEV_ARM_BASE_GIC_H__
 
#include <memory>
#include <unordered_map>
#include <vector>
 
#include "arch/arm/system.hh"
#include "dev/intpin.hh"
#include "dev/io_device.hh"
 
#include "enums/ArmInterruptType.hh"
 
namespace gem5
{
 
class Platform;
class RealView;
class ThreadContext;
class ArmInterruptPin;
class ArmSPI;
class ArmPPI;
class ArmSigInterruptPin;
 
struct ArmInterruptPinParams;
struct ArmPPIParams;
struct ArmSPIParams;
struct ArmSigInterruptPinParams;
struct BaseGicParams;
 
class BaseGic :  public PioDevice
{
  public:
    typedef BaseGicParams Params;
    enum class GicVersion { GIC_V2, GIC_V3, GIC_V4 };
 
    BaseGic(const Params &p);
    virtual ~BaseGic();
    void init() override;
 
    const Params &params() const;

    virtual void sendInt(uint32_t num) = 0;

    virtual void sendPPInt(uint32_t num, uint32_t cpu) = 0;
    virtual void clearPPInt(uint32_t num, uint32_t cpu) = 0;

    virtual void clearInt(uint32_t num) = 0;
 
    ArmSystem *
    getSystem() const
    {
        return (ArmSystem *) sys;
    }

    virtual bool supportsVersion(GicVersion version) = 0;
 
  protected: // GIC state transfer
    virtual bool blockIntUpdate() const { return false; }
 
  protected:
    Platform *platform;
};

class ArmInterruptPinGen : public SimObject
{
  public:
    ArmInterruptPinGen(const ArmInterruptPinParams &p);
 
    virtual ArmInterruptPin* get(ThreadContext *tc = nullptr) = 0;
};

class ArmSPIGen : public ArmInterruptPinGen
{
  public:
    ArmSPIGen(const ArmSPIParams &p);
 
    ArmInterruptPin* get(ThreadContext *tc = nullptr) override;
  protected:
    ArmSPI* pin;
};

class ArmPPIGen : public ArmInterruptPinGen
{
  public:
    PARAMS(ArmPPI);
    ArmPPIGen(const Params &p);
 
    ArmInterruptPin* get(ThreadContext* tc = nullptr) override;
  protected:
    std::unordered_map<ContextID, ArmPPI*> pins;
};
 
class ArmSigInterruptPinGen : public ArmInterruptPinGen
{
  public:
    ArmSigInterruptPinGen(const ArmSigInterruptPinParams &p);
 
    ArmInterruptPin* get(ThreadContext* tc = nullptr) override;
    Port &getPort(const std::string &if_name,
                  PortID idx = InvalidPortID) override;
 
  protected:
    ArmSigInterruptPin* pin;
};

class ArmInterruptPin : public Serializable
{
    friend class ArmInterruptPinGen;
  protected:
    ArmInterruptPin(const ArmInterruptPinParams &p, ThreadContext *tc);
 
  public: /* Public interface */
    void setThreadContext(ThreadContext *tc);

    uint32_t num() const { return intNum; }

    bool active() const { return _active; }

    virtual void raise() = 0;
    virtual void clear() = 0;
 
  public: /* Serializable interface */
    void serialize(CheckpointOut &cp) const override;
    void unserialize(CheckpointIn &cp) override;
 
  protected:
    ContextID targetContext() const;

    const ThreadContext *threadContext;

    RealView *const platform;

    const uint32_t intNum;

    const ArmInterruptType triggerType;

    bool _active;
};
 
class ArmSPI : public ArmInterruptPin
{
    friend class ArmSPIGen;
  private:
    ArmSPI(const ArmSPIParams &p);
 
  public:
    void raise() override;
    void clear() override;
};
 
class ArmPPI : public ArmInterruptPin
{
    friend class ArmPPIGen;
  private:
    ArmPPI(const ArmPPIParams &p, ThreadContext *tc);
 
  public:
    void raise() override;
    void clear() override;
};
 
class ArmSigInterruptPin : public ArmInterruptPin
{
    friend class ArmSigInterruptPinGen;
  private:
    ArmSigInterruptPin(const ArmSigInterruptPinParams &p);
 
    std::vector<std::unique_ptr<IntSourcePin<ArmSigInterruptPinGen>>> sigPin;
 
  public:
    void raise() override;
    void clear() override;
};
 
} // namespace gem5
 
#endif // __DEV_ARM_BASE_GIC_H__