gem5 [DEVELOP-FOR-25.0]
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comm_monitor.cc
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1/*
2 * Copyright (c) 2012-2013, 2015, 2018-2019 ARM Limited
3 * Copyright (c) 2016 Google Inc.
4 * Copyright (c) 2017, Centre National de la Recherche Scientifique
5 * All rights reserved.
6 *
7 * The license below extends only to copyright in the software and shall
8 * not be construed as granting a license to any other intellectual
9 * property including but not limited to intellectual property relating
10 * to a hardware implementation of the functionality of the software
11 * licensed hereunder. You may use the software subject to the license
12 * terms below provided that you ensure that this notice is replicated
13 * unmodified and in its entirety in all distributions of the software,
14 * modified or unmodified, in source code or in binary form.
15 *
16 * Redistribution and use in source and binary forms, with or without
17 * modification, are permitted provided that the following conditions are
18 * met: redistributions of source code must retain the above copyright
19 * notice, this list of conditions and the following disclaimer;
20 * redistributions in binary form must reproduce the above copyright
21 * notice, this list of conditions and the following disclaimer in the
22 * documentation and/or other materials provided with the distribution;
23 * neither the name of the copyright holders nor the names of its
24 * contributors may be used to endorse or promote products derived from
25 * this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
30 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
31 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
32 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
33 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
34 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
35 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
36 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
37 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38 */
39
40#include "mem/comm_monitor.hh"
41
42#include "base/trace.hh"
43#include "debug/CommMonitor.hh"
44#include "sim/core.hh"
45#include "sim/cur_tick.hh"
46#include "sim/stats.hh"
47
48namespace gem5
49{
50
53 memSidePort(name() + "-mem_side_port", *this),
54 cpuSidePort(name() + "-cpu_side_port", *this),
56 samplePeriodTicks(params.sample_period),
57 samplePeriod(params.sample_period / sim_clock::as_float::s),
58 stats(this, params)
59{
61 "Created monitor %s with sample period %d ticks (%f ms)\n",
62 name(), samplePeriodTicks, samplePeriod * 1E3);
63}
64
65void
67{
68 // make sure both sides of the monitor are connected
69 if (!cpuSidePort.isConnected() || !memSidePort.isConnected())
70 fatal("Communication monitor is not connected on both sides.\n");
71}
72
73void
75{
76 ppPktReq.reset(new probing::Packet(getProbeManager(), "PktRequest"));
77 ppPktResp.reset(new probing::Packet(getProbeManager(), "PktResponse"));
78}
79
80Port &
81CommMonitor::getPort(const std::string &if_name, PortID idx)
82{
83 if (if_name == "mem_side_port") {
84 return memSidePort;
85 } else if (if_name == "cpu_side_port") {
86 return cpuSidePort;
87 } else {
88 return SimObject::getPort(if_name, idx);
89 }
90}
91
92void
94{
95 memSidePort.sendFunctional(pkt);
96}
97
98void
100{
101 cpuSidePort.sendFunctionalSnoop(pkt);
102}
103
105 const CommMonitorParams &params)
106 : statistics::Group(parent),
107
108 disableBurstLengthHists(params.disable_burst_length_hists),
110 "Histogram of burst lengths of transmitted packets"),
112 "Histogram of burst lengths of transmitted packets"),
113
114 disableBandwidthHists(params.disable_bandwidth_hists),
115 readBytes(0),
117 statistics::units::Byte, statistics::units::Second>::get(),
118 "Histogram of read bandwidth per sample period"),
120 "Number of bytes read"),
122 statistics::units::Byte, statistics::units::Second>::get(),
123 "Average read bandwidth",
125
126 writtenBytes(0),
128 statistics::units::Byte, statistics::units::Second>::get(),
129 "Histogram of write bandwidth"),
131 statistics::units::Byte, statistics::units::Second>::get(),
132 "Number of bytes written"),
134 statistics::units::Byte, statistics::units::Second>::get(),
135 "Average write bandwidth",
137
138 disableLatencyHists(params.disable_latency_hists),
140 "Read request-response latency"),
142 "Write request-response latency"),
143
144 disableITTDists(params.disable_itt_dists),
146 "Read-to-read inter transaction time"),
148 "Write-to-write inter transaction time"),
150 "Request-to-request inter transaction time"),
152
153 disableOutstandingHists(params.disable_outstanding_hists),
155 "Outstanding read transactions"),
158 "Outstanding write transactions"),
160
161 disableTransactionHists(params.disable_transaction_hists),
162 ADD_STAT(readTransHist, statistics::units::Count::get(),
163 "Histogram of read transactions per sample period"),
164 readTrans(0),
165 ADD_STAT(writeTransHist, statistics::units::Count::get(),
166 "Histogram of write transactions per sample period"),
167 writeTrans(0),
168
169 disableAddrDists(params.disable_addr_dists),
170 readAddrMask(params.read_addr_mask),
171 writeAddrMask(params.write_addr_mask),
172 ADD_STAT(readAddrDist, statistics::units::Count::get(),
173 "Read address distribution"),
174 ADD_STAT(writeAddrDist, statistics::units::Count::get(),
175 "Write address distribution")
176{
177 using namespace statistics;
178
180 .init(params.burst_length_bins)
182
184 .init(params.burst_length_bins)
186
187 // Stats based on received responses
189 .init(params.bandwidth_bins)
190 .flags(disableBandwidthHists ? nozero : pdf);
191
193 .flags(disableBandwidthHists ? nozero : pdf);
194
196 .flags(disableBandwidthHists ? nozero : pdf);
197
198 // Stats based on successfully sent requests
200 .init(params.bandwidth_bins)
201 .flags(disableBandwidthHists ? (pdf | nozero) : pdf);
202
204 .flags(disableBandwidthHists ? nozero : pdf);
205
207 .flags(disableBandwidthHists ? nozero : pdf);
208
209
211 .init(params.latency_bins)
212 .flags(disableLatencyHists ? nozero : pdf);
213
215 .init(params.latency_bins)
216 .flags(disableLatencyHists ? nozero : pdf);
217
219 .init(1, params.itt_max_bin, params.itt_max_bin /
220 params.itt_bins)
221 .flags(disableITTDists ? nozero : pdf);
222
224 .init(1, params.itt_max_bin, params.itt_max_bin /
225 params.itt_bins)
226 .flags(disableITTDists ? nozero : pdf);
227
229 .init(1, params.itt_max_bin, params.itt_max_bin /
230 params.itt_bins)
231 .flags(disableITTDists ? nozero : pdf);
232
234 .init(params.outstanding_bins)
236
238 .init(params.outstanding_bins)
240
242 .init(params.transaction_bins)
244
246 .init(params.transaction_bins)
248
250 .init(0)
251 .flags(disableAddrDists ? nozero : pdf);
252
254 .init(0)
255 .flags(disableAddrDists ? nozero : pdf);
256}
257
258void
260 const probing::PacketInfo& pkt_info, bool is_atomic,
261 bool expects_response)
262{
263 if (pkt_info.cmd.isRead()) {
264 // Increment number of observed read transactions
266 ++readTrans;
267
268 // Get sample of burst length
270 readBurstLengthHist.sample(pkt_info.size);
271
272 // Sample the masked address
273 if (!disableAddrDists)
274 readAddrDist.sample(pkt_info.addr & readAddrMask);
275
276 if (!disableITTDists) {
277 // Sample value of read-read inter transaction time
278 if (timeOfLastRead != 0)
281
282 // Sample value of req-req inter transaction time
283 if (timeOfLastReq != 0)
284 ittReqReq.sample(curTick() - timeOfLastReq);
286 }
287 if (!is_atomic && !disableOutstandingHists && expects_response)
289
290 } else if (pkt_info.cmd.isWrite()) {
291 // Same as for reads
293 ++writeTrans;
294
296 writeBurstLengthHist.sample(pkt_info.size);
297
298 // Update the bandwidth stats on the request
300 writtenBytes += pkt_info.size;
301 totalWrittenBytes += pkt_info.size;
302 }
303
304 // Sample the masked write address
305 if (!disableAddrDists)
306 writeAddrDist.sample(pkt_info.addr & writeAddrMask);
307
308 if (!disableITTDists) {
309 // Sample value of write-to-write inter transaction time
310 if (timeOfLastWrite != 0)
313
314 // Sample value of req-to-req inter transaction time
315 if (timeOfLastReq != 0)
316 ittReqReq.sample(curTick() - timeOfLastReq);
318 }
319
320 if (!is_atomic && !disableOutstandingHists && expects_response)
322 }
323}
324
325void
327 const probing::PacketInfo& pkt_info, Tick latency, bool is_atomic)
328{
329 if (pkt_info.cmd.isRead()) {
330 // Decrement number of outstanding read requests
331 if (!is_atomic && !disableOutstandingHists) {
332 assert(outstandingReadReqs != 0);
334 }
335
337 readLatencyHist.sample(latency);
338
339 // Update the bandwidth stats based on responses for reads
341 readBytes += pkt_info.size;
342 totalReadBytes += pkt_info.size;
343 }
344
345 } else if (pkt_info.cmd.isWrite()) {
346 // Decrement number of outstanding write requests
347 if (!is_atomic && !disableOutstandingHists) {
348 assert(outstandingWriteReqs != 0);
350 }
351
353 writeLatencyHist.sample(latency);
354 }
355}
356
357Tick
359{
360 const bool expects_response(pkt->needsResponse() &&
361 !pkt->cacheResponding());
362 probing::PacketInfo req_pkt_info(pkt);
363 ppPktReq->notify(req_pkt_info);
364
365 const Tick delay(memSidePort.sendAtomic(pkt));
366
367 stats.updateReqStats(req_pkt_info, true, expects_response);
368 if (expects_response)
369 stats.updateRespStats(req_pkt_info, delay, true);
370
371 // Some packets, such as WritebackDirty, don't need response.
372 assert(pkt->isResponse() || !expects_response);
373 probing::PacketInfo resp_pkt_info(pkt);
374 ppPktResp->notify(resp_pkt_info);
375 return delay;
376}
377
378Tick
380{
381 return cpuSidePort.sendAtomicSnoop(pkt);
382}
383
384bool
386{
387 // should always see a request
388 assert(pkt->isRequest());
389
390 // Store relevant fields of packet, because packet may be modified
391 // or even deleted when sendTiming() is called.
392 const probing::PacketInfo pkt_info(pkt);
393
394 const bool expects_response(pkt->needsResponse() &&
395 !pkt->cacheResponding());
396
397 // If a cache miss is served by a cache, a monitor near the memory
398 // would see a request which needs a response, but this response
399 // would not come back from the memory. Therefore we additionally
400 // have to check the cacheResponding flag
401 if (expects_response && !stats.disableLatencyHists) {
403 }
404
405 // Attempt to send the packet
406 bool successful = memSidePort.sendTimingReq(pkt);
407
408 // If not successful, restore the sender state
409 if (!successful && expects_response && !stats.disableLatencyHists) {
410 delete pkt->popSenderState();
411 }
412
413 if (successful) {
414 ppPktReq->notify(pkt_info);
415 }
416
417 if (successful) {
418 DPRINTF(CommMonitor, "Forwarded %s request\n", pkt->isRead() ? "read" :
419 pkt->isWrite() ? "write" : "non read/write");
420 stats.updateReqStats(pkt_info, false, expects_response);
421 }
422 return successful;
423}
424
425bool
427{
428 // should always see responses
429 assert(pkt->isResponse());
430
431 // Store relevant fields of packet, because packet may be modified
432 // or even deleted when sendTiming() is called.
433 const probing::PacketInfo pkt_info(pkt);
434
435 Tick latency = 0;
436 CommMonitorSenderState* received_state =
437 dynamic_cast<CommMonitorSenderState*>(pkt->senderState);
438
439 if (!stats.disableLatencyHists) {
440 // Restore initial sender state
441 if (received_state == NULL)
442 panic("Monitor got a response without monitor sender state\n");
443
444 // Restore the sate
445 pkt->senderState = received_state->predecessor;
446 }
447
448 // Attempt to send the packet
449 bool successful = cpuSidePort.sendTimingResp(pkt);
450
451 if (!stats.disableLatencyHists) {
452 // If packet successfully send, sample value of latency,
453 // afterwards delete sender state, otherwise restore state
454 if (successful) {
455 latency = curTick() - received_state->transmitTime;
456 DPRINTF(CommMonitor, "Latency: %d\n", latency);
457 delete received_state;
458 } else {
459 // Don't delete anything and let the packet look like we
460 // did not touch it
461 pkt->senderState = received_state;
462 }
463 }
464
465 if (successful) {
466 ppPktResp->notify(pkt_info);
467 DPRINTF(CommMonitor, "Received %s response\n", pkt->isRead() ? "read" :
468 pkt->isWrite() ? "write" : "non read/write");
469 stats.updateRespStats(pkt_info, latency, false);
470 }
471 return successful;
472}
473
474void
476{
477 cpuSidePort.sendTimingSnoopReq(pkt);
478}
479
480bool
482{
483 return memSidePort.sendTimingSnoopResp(pkt);
484}
485
486void
488{
489 cpuSidePort.sendRetrySnoopResp();
490}
491
492bool
494{
495 // check if the connected request port is snooping
496 return cpuSidePort.isSnooping();
497}
498
501{
502 // get the address ranges of the connected CPU-side port
503 return memSidePort.getAddrRanges();
504}
505
506void
508{
509 cpuSidePort.sendRetryReq();
510}
511
512void
514{
515 memSidePort.sendRetryResp();
516}
517
518bool
520{
521 return memSidePort.tryTiming(pkt);
522}
523
524void
526{
527 cpuSidePort.sendRangeChange();
528}
529
530void
532{
533 // the periodic stats update runs on the granularity of sample
534 // periods, but in combination with this there may also be a
535 // external resets and dumps of the stats (through schedStatEvent)
536 // causing the stats themselves to capture less than a sample
537 // period
538
539 // only capture if we have not reset the stats during the last
540 // sample period
541 if (simTicks.value() >= samplePeriodTicks) {
542 if (!stats.disableTransactionHists) {
543 stats.readTransHist.sample(stats.readTrans);
544 stats.writeTransHist.sample(stats.writeTrans);
545 }
546
547 if (!stats.disableBandwidthHists) {
548 stats.readBandwidthHist.sample(stats.readBytes / samplePeriod);
549 stats.writeBandwidthHist.sample(stats.writtenBytes / samplePeriod);
550 }
551
552 if (!stats.disableOutstandingHists) {
553 stats.outstandingReadsHist.sample(stats.outstandingReadReqs);
554 stats.outstandingWritesHist.sample(stats.outstandingWriteReqs);
555 }
556 }
557
558 // reset the sampled values
559 stats.readTrans = 0;
560 stats.writeTrans = 0;
561
562 stats.readBytes = 0;
563 stats.writtenBytes = 0;
564
566}
567
568void
573
574} // namespace gem5
#define DPRINTF(x,...)
Definition trace.hh:209
Sender state class for the monitor so that we can annotate packets with a transmit time and receive t...
Tick transmitTime
Tick when request is transmitted.
The communication monitor is a SimObject which can monitor statistics of the communication happening ...
void init() override
init() is called after all C++ SimObjects have been created and all ports are connected.
const Tick samplePeriodTicks
Length of simulation time bin.
probing::PacketUPtr ppPktReq
Successfully forwarded request packet.
void recvTimingSnoopReq(PacketPtr pkt)
EventFunctionWrapper samplePeriodicEvent
Periodic event called at the end of each simulation time bin.
void recvFunctionalSnoop(PacketPtr pkt)
void recvFunctional(PacketPtr pkt)
CommMonitorParams Params
Parameters of communication monitor.
Port & getPort(const std::string &if_name, PortID idx=InvalidPortID) override
Get a port with a given name and index.
Tick recvAtomic(PacketPtr pkt)
void startup() override
startup() is the final initialization call before simulation.
bool recvTimingSnoopResp(PacketPtr pkt)
MonitorResponsePort cpuSidePort
Instance of response port, i.e.
Tick recvAtomicSnoop(PacketPtr pkt)
void regProbePoints() override
Register probe points for this object.
MonitorStats stats
Instantiate stats.
const double samplePeriod
Sample period in seconds.
bool tryTiming(PacketPtr pkt)
bool recvTimingReq(PacketPtr pkt)
bool isSnooping() const
AddrRangeList getAddrRanges() const
probing::PacketUPtr ppPktResp
Successfully forwarded response packet.
void samplePeriodic()
This function is called periodically at the end of each time bin.
CommMonitor(const Params &params)
Constructor based on the Python params.
bool recvTimingResp(PacketPtr pkt)
MonitorRequestPort memSidePort
Instance of request port, facing the memory side.
bool isRead() const
Definition packet.hh:227
bool isWrite() const
Definition packet.hh:228
virtual std::string name() const
Definition named.hh:60
bool isRead() const
Definition packet.hh:593
bool isResponse() const
Definition packet.hh:598
bool needsResponse() const
Definition packet.hh:608
SenderState * senderState
This packet's sender state.
Definition packet.hh:545
void pushSenderState(SenderState *sender_state)
Push a new sender state to the packet and make the current sender state the predecessor of the new on...
Definition packet.cc:334
SenderState * popSenderState()
Pop the top of the state stack and return a pointer to it.
Definition packet.cc:342
bool isWrite() const
Definition packet.hh:594
bool cacheResponding() const
Definition packet.hh:659
bool isRequest() const
Definition packet.hh:597
Ports are used to interface objects to each other.
Definition port.hh:62
Statistics container.
Definition group.hh:93
#define ADD_STAT(n,...)
Convenience macro to add a stat to a statistics group.
Definition group.hh:75
std::list< AddrRange > AddrRangeList
Convenience typedef for a collection of address ranges.
Definition addr_range.hh:64
void schedule(Event &event, Tick when)
Definition eventq.hh:1012
#define panic(...)
This implements a cprintf based panic() function.
Definition logging.hh:220
#define fatal(...)
This implements a cprintf based fatal() function.
Definition logging.hh:232
const Params & params() const
SimObject(const Params &p)
Definition sim_object.cc:58
ProbeManager * getProbeManager()
Get the probe manager for this object.
virtual Port & getPort(const std::string &if_name, PortID idx=InvalidPortID)
Get a port with a given name and index.
ProbePointArg< PacketInfo > Packet
Packet probe point.
Definition mem.hh:108
double s
These variables equal the number of ticks in the unit of time they're named after in a double.
Definition core.cc:51
Units for Stats.
Definition units.hh:113
const FlagsType pdf
Print the percent of the total that this entry represents.
Definition info.hh:61
const FlagsType nozero
Don't print if this is zero.
Definition info.hh:67
Copyright (c) 2024 Arm Limited All rights reserved.
Definition binary32.hh:36
Tick curTick()
The universal simulation clock.
Definition cur_tick.hh:46
int16_t PortID
Port index/ID type, and a symbolic name for an invalid port id.
Definition types.hh:245
uint64_t Tick
Tick count type.
Definition types.hh:58
Packet * PacketPtr
statistics::Value & simTicks
Definition stats.cc:46
statistics::Formula & simSeconds
Definition stats.cc:45
statistics::SparseHistogram writeAddrDist
Histogram of number of write accesses to addresses over time.
statistics::Distribution ittReqReq
const Addr readAddrMask
Address mask for sources of read accesses to be captured.
statistics::Histogram writeBandwidthHist
void updateRespStats(const probing::PacketInfo &pkt, Tick latency, bool is_atomic)
unsigned int writtenBytes
Histogram for write bandwidth per sample window.
statistics::Scalar totalWrittenBytes
bool disableBurstLengthHists
Disable flag for burst length histograms.
const Addr writeAddrMask
Address mask for sources of write accesses to be captured.
bool disableAddrDists
Disable flag for address distributions.
statistics::Histogram writeLatencyHist
Histogram of write request-to-response latencies.
statistics::Histogram outstandingWritesHist
Histogram of outstanding write requests.
statistics::Histogram writeBurstLengthHist
Histogram of write burst lengths.
bool disableTransactionHists
Disable flag for transaction histograms.
statistics::Histogram readLatencyHist
Histogram of read request-to-response latencies.
statistics::Histogram readTransHist
Histogram of number of read transactions per time bin.
bool disableLatencyHists
Disable flag for latency histograms.
bool disableBandwidthHists
Disable flag for the bandwidth histograms.
statistics::SparseHistogram readAddrDist
Histogram of number of read accesses to addresses over time.
statistics::Formula averageWriteBandwidth
statistics::Scalar totalReadBytes
unsigned int readBytes
Histogram for read bandwidth per sample window.
statistics::Histogram readBurstLengthHist
Histogram of read burst lengths.
bool disableITTDists
Disable flag for ITT distributions.
statistics::Histogram writeTransHist
Histogram of number of timing write transactions per time bin.
MonitorStats(statistics::Group *parent, const CommMonitorParams &params)
Create the monitor stats and initialise all the members that are not statistics themselves,...
statistics::Histogram outstandingReadsHist
Histogram of outstanding read requests.
statistics::Distribution ittWriteWrite
void updateReqStats(const probing::PacketInfo &pkt, bool is_atomic, bool expects_response)
statistics::Histogram readBandwidthHist
statistics::Formula averageReadBandwidth
bool disableOutstandingHists
Disable flag for outstanding histograms.
statistics::Distribution ittReadRead
Inter transaction time (ITT) distributions.
SenderState * predecessor
Definition packet.hh:470
A struct to hold on to the essential fields from a packet, so that the packet and underlying request ...
Definition mem.hh:58
const std::string & name()
Definition trace.cc:48

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