conditional.hh

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/* @file
 * Conditional branch predictor interface
 */
 
#ifndef __CPU_PRED_CONDITIONAL_BASE_HH__
#define __CPU_PRED_CONDITIONAL_BASE_HH__
 
#include "arch/generic/pcstate.hh"
#include "cpu/inst_seq.hh"
#include "cpu/pred/branch_type.hh"
#include "params/ConditionalPredictor.hh"
#include "sim/sim_object.hh"
 
namespace gem5
{
 
namespace branch_prediction
{
 
class ConditionalPredictor : public SimObject
{
  public:
 
    typedef ConditionalPredictorParams Params;
 
    ConditionalPredictor(const Params &params);
 

    virtual bool lookup(ThreadID tid, Addr pc, void * &bp_history) = 0;

    virtual void updateHistories(ThreadID tid, Addr pc, bool uncond,
                                 bool taken, Addr target,
                                 const StaticInstPtr &inst,
                                 void * &bp_history) = 0;

    virtual void squash(ThreadID tid, void * &bp_history) = 0;
 

    virtual void update(ThreadID tid, Addr pc, bool taken,
                        void * &bp_history, bool squashed,
                        const StaticInstPtr &inst, Addr target) = 0;

    virtual void branchPlaceholder(ThreadID tid, Addr pc,
                                   bool uncond, void * &bp_history);
  protected:

    const unsigned instShiftAmt;
};
 
} // namespace branch_prediction
} // namespace gem5
 
#endif // __CPU_PRED_CONDITIONAL_BASE_HH__