dramsys_wrapper.hh

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/*
 * Copyright (c) 2022 Fraunhofer IESE
 * All rights reserved
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 * modification, are permitted provided that the following conditions are
 * met: redistributions of source code must retain the above copyright
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 * redistributions in binary form must reproduce the above copyright
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 * documentation and/or other materials provided with the distribution;
 * neither the name of the copyright holders nor the names of its
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 * this software without specific prior written permission.
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#ifndef __MEM_DRAMSYS_WRAPPER_HH__
#define __MEM_DRAMSYS_WRAPPER_HH__
 
#include <iostream>
#include <memory>
 
#include "DRAMSys/config/DRAMSysConfiguration.h"
#include "DRAMSys/simulation/DRAMSys.h"
#include "mem/abstract_mem.hh"
#include "params/DRAMSys.hh"
#include "sim/core.hh"
#include "systemc/core/kernel.hh"
#include "systemc/ext/core/sc_module_name.hh"
 
#include "systemc/ext/systemc"
#include "systemc/ext/tlm"
#include "systemc/ext/tlm_utils/simple_target_socket.h"
#include "systemc/tlm_port_wrapper.hh"
 
namespace gem5
{
 
namespace memory
{
 
class DRAMSysWrapper : public sc_core::sc_module
{
    friend class DRAMSys;
 
  public:
    SC_HAS_PROCESS(DRAMSysWrapper);
    DRAMSysWrapper(sc_core::sc_module_name name,
                   ::DRAMSys::Config::Configuration const &config,
                   AddrRange range);
 
  private:
    tlm::tlm_sync_enum nb_transport_fw(tlm::tlm_generic_payload &payload,
                                       tlm::tlm_phase &phase,
                                       sc_core::sc_time &fwDelay);
 
    tlm::tlm_sync_enum nb_transport_bw(tlm::tlm_generic_payload &payload,
                                       tlm::tlm_phase &phase,
                                       sc_core::sc_time &bwDelay);
 
    void b_transport(tlm::tlm_generic_payload &payload,
                     sc_core::sc_time &delay);
 
    unsigned int transport_dbg(tlm::tlm_generic_payload &trans);
 
    tlm_utils::simple_initiator_socket<DRAMSysWrapper> iSocket;
    tlm_utils::simple_target_socket<DRAMSysWrapper> tSocket;
 
    std::shared_ptr<::DRAMSys::DRAMSys> dramsys;
 
    AddrRange range;
};
 
} // namespace memory
} // namespace gem5
 
#endif // __MEM_DRAMSYS_WRAPPER_HH__