tlb.hh

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#ifndef __ARCH_GENERIC_TLB_HH__
#define __ARCH_GENERIC_TLB_HH__
 
#include <type_traits>
 
#include "arch/generic/mmu.hh"
#include "base/logging.hh"
#include "enums/TypeTLB.hh"
#include "mem/request.hh"
#include "params/BaseTLB.hh"
#include "sim/sim_object.hh"
 
namespace gem5
{
 
class ThreadContext;
 
class BaseTLB : public SimObject
{
  protected:
    BaseTLB(const BaseTLBParams &p)
      : SimObject(p), _type(p.entry_type), _nextLevel(p.next_level)
    {}
 
    TypeTLB _type;
 
    BaseTLB *_nextLevel;
 
  public:
    virtual void demapPage(Addr vaddr, uint64_t asn) = 0;
 
    virtual Fault translateAtomic(
            const RequestPtr &req, ThreadContext *tc, BaseMMU::Mode mode) = 0;
    virtual void translateTiming(
            const RequestPtr &req, ThreadContext *tc,
            BaseMMU::Translation *translation, BaseMMU::Mode mode) = 0;
    virtual Fault
    translateFunctional(const RequestPtr &req, ThreadContext *tc,
                        BaseMMU::Mode mode)
    {
        panic("Not implemented.\n");
    }

    virtual Fault finalizePhysical(
            const RequestPtr &req, ThreadContext *tc,
            BaseMMU::Mode mode) const = 0;

    virtual void flushAll() = 0;

    virtual void takeOverFrom(BaseTLB *otlb) = 0;

    virtual Port* getTableWalkerPort() { return NULL; }
 
    void memInvalidate() { flushAll(); }
 
    TypeTLB type() const { return _type; }
 
    BaseTLB* nextLevel() const { return _nextLevel; }
};

inline auto
operator&(TypeTLB lhs, TypeTLB rhs)
{
    using T = std::underlying_type_t<TypeTLB>;
    return static_cast<T>(lhs) & static_cast<T>(rhs);
}
 
} // namespace gem5
 
#endif // __ARCH_GENERIC_TLB_HH__