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gem5 [DEVELOP-FOR-25.0]
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Malta I/O Space mapping including RTC/timer interrupts. More...
#include "dev/mips/malta.hh"#include "dev/mips/malta_cchip.hh"#include "dev/intel_8254_timer.hh"#include "dev/io_device.hh"#include "dev/mc146818.hh"#include "params/MaltaIO.hh"#include "sim/eventq.hh"Go to the source code of this file.
Classes | |
| class | gem5::MaltaIO |
| Malta I/O device is a catch all for all the south bridge stuff we care to implement. More... | |
| class | gem5::MaltaIO::RTC |
Namespaces | |
| namespace | gem5 |
| Copyright (c) 2024 Arm Limited All rights reserved. | |
Malta I/O Space mapping including RTC/timer interrupts.
Definition in file malta_io.hh.