39#ifndef __MEM_QOS_MEM_SINK_HH__
40#define __MEM_QOS_MEM_SINK_HH__
51#include "params/QoSMemSinkCtrl.hh"
57struct QoSMemSinkInterfaceParams;
162 void init()
override;
AbstractMemory declaration.
Defines global host-dependent types: Counter, Tick, and (indirectly) {int,uint}{8,...
Wrap a member function inside MemberEventWrapper to use it as an event callback.
Ports are used to interface objects to each other.
QueuedResponsePort(const std::string &name, RespPacketQueue &resp_queue, PortID id=InvalidPortID)
Create a QueuedPort with a given name, owner, and a supplied implementation of a packet queue.
AbstractMemory(const AbstractMemory &)
MemCtrl(const QoSMemCtrlParams &)
QoS Memory base class.
void recvFunctional(PacketPtr pkt)
Receive a Packet in Functional mode.
MemoryPort(const std::string &, MemSinkCtrl &)
Constructor.
AddrRangeList getAddrRanges() const
Gets the configured address ranges for this port.
Tick recvAtomic(PacketPtr pkt)
Receive a Packet in Atomic mode.
bool recvTimingReq(PacketPtr pkt)
Receive a Packet in Timing mode.
RespPacketQueue queue
Outgoing packet responses queue.
MemSinkCtrl & mem
reference to parent memory object
MemoryPort port
Memory response port.
Tick recvAtomic(PacketPtr pkt)
Receive a Packet in Atomic mode.
const Tick responseLatency
Memory response latency (ticks)
Port & getPort(const std::string &if_name, PortID=InvalidPortID) override
Getter method to access this memory's response port.
MemberEventWrapper<&MemSinkCtrl::processNextReqEvent > nextReqEvent
Event wrapper to schedule next request handler function.
const uint64_t writeBufferSize
Write request packets queue buffer size in #packets.
DrainState drain() override
Checks and return the Drain state of this SimObject.
bool readQueueFull(const uint64_t packets) const
Check if the read queue has room for more entries.
bool recvTimingReq(PacketPtr pkt)
Receive a Packet in Timing mode.
const uint64_t readBufferSize
Read request packets queue buffer size in #packets.
bool retryWrReq
Write request pending.
std::vector< PacketQueue > readQueue
QoS-aware (per priority) incoming read requests packets queue.
bool retryRdReq
Read request pending.
std::deque< PacketPtr > PacketQueue
The Request packets are store in a multiple dequeue structure, based on their QoS priority.
void processNextReqEvent()
Processes the next Request event according to configured request latency.
bool writeQueueFull(const uint64_t packets) const
Check if the write queue has room for more entries.
const Tick requestLatency
Memory between requests latency (ticks)
const uint64_t memoryPacketSize
Memory packet size in bytes.
void init() override
Initializes this object.
MemSinkCtrl(const QoSMemSinkCtrlParams &)
QoS Memory Sink Constructor.
void recvFunctional(PacketPtr pkt)
Receive a Packet in Functional mode.
Tick nextRequest
Next request service time.
std::vector< PacketQueue > writeQueue
QoS-aware (per priority) incoming read requests packets queue.
MemSinkInterface *const interface
Create pointer to interface of actual media.
MemSinkInterface(const QoSMemSinkInterfaceParams &_p)
MemSinkCtrl * ctrl
Pointer to the controller.
void setMemCtrl(MemSinkCtrl *_ctrl)
Setting a pointer to the interface.
This is a simple scalar statistic, like a counter.
std::list< AddrRange > AddrRangeList
Convenience typedef for a collection of address ranges.
DrainState
Object drain/handover states.
Copyright (c) 2024 Arm Limited All rights reserved.
const PortID InvalidPortID
int16_t PortID
Port index/ID type, and a symbolic name for an invalid port id.
uint64_t Tick
Tick count type.
Declaration of the queued port.
statistics::Scalar numReadRetries
Count the number of read retries.
MemSinkCtrlStats(statistics::Group *parent)
statistics::Scalar numWriteRetries
Count the number of write retries.