pmp.hh

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#ifndef __ARCH_RISCV_PMP_HH__
#define __ARCH_RISCV_PMP_HH__
 
#include "arch/generic/tlb.hh"
#include "arch/riscv/isa.hh"
#include "base/addr_range.hh"
#include "base/types.hh"
#include "mem/packet.hh"
#include "params/PMP.hh"
#include "sim/sim_object.hh"

 
namespace gem5
{
 
namespace RiscvISA
{

class PMP : public SimObject
{
  public:
    PARAMS(PMP);
    PMP(const Params &params);
 
  private:
    int pmpEntries;

    enum pmpAmatch
    {
        PMP_OFF,
        PMP_TOR,
        PMP_NA4,
        PMP_NAPOT
    };

    const uint8_t PMP_READ = 1 << 0;

    const uint8_t PMP_WRITE = 1 << 1;

    const uint8_t PMP_EXEC = 1 << 2;

    const uint8_t PMP_A_MASK = 3 << 3;

    const uint8_t PMP_LOCK = 1 << 7;

    int numRules;

    struct PmpEntry
    {
        AddrRange pmpAddr = AddrRange(0, 0);
        Addr rawAddr;
        uint8_t pmpCfg = 0;
    };

    std::vector<PmpEntry> pmpTable;
 
  public:
    Fault pmpCheck(const RequestPtr &req, BaseMMU::Mode mode,
                  PrivilegeMode pmode, ThreadContext *tc,
                  Addr vaddr = 0);

    bool pmpUpdateCfg(uint32_t pmp_index, uint8_t this_cfg);

    bool pmpUpdateAddr(uint32_t pmp_index, Addr this_addr);

    void pmpReset();
 
  private:
    Fault createAddrfault(Addr vaddr, BaseMMU::Mode mode);

    Fault createDefaultFault(const RequestPtr &req, BaseMMU::Mode mode,
                             PrivilegeMode pmode, Addr vaddr = 0);

    void pmpUpdateRule(uint32_t pmp_index);

    inline uint8_t pmpGetAField(uint8_t cfg);

    inline AddrRange pmpDecodeNapot(Addr pmpaddr);
 
};
 
} // namespace RiscvISA
} // namespace gem5
 
#endif // __ARCH_RISCV_PMP_HH__