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rtc_pl031.hh
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1/*
2 * Copyright (c) 2010-2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 */
37
38#ifndef __DEV_ARM_RTC_PL310_HH__
39#define __DEV_ARM_RTC_PL310_HH__
40
42
46
47namespace gem5
48{
49
50struct PL031Params;
51
52class PL031 : public AmbaIntDevice
53{
54 protected:
55 enum
56 {
57 DataReg = 0x00,
58 MatchReg = 0x04,
59 LoadReg = 0x08,
60 ControlReg = 0x0C,
61 IntMask = 0x10,
62 RawISR = 0x14,
63 MaskedISR = 0x18,
64 IntClear = 0x1C,
65 };
66
67 /* Seconds since epoch that correspond to time simulation was started at the
68 * begining of simulation and is then updated if ever written. */
69 uint32_t timeVal;
70
71 /* Time when the timeVal register was written */
73
74 /* Previous load value */
75 uint32_t loadVal;
76
77 /* RTC Match Value
78 * Cause an interrupt when this value hits counter
79 */
80 uint32_t matchVal;
81
84 bool rawInt;
85
89 bool maskInt;
90
94
96 void counterMatch();
98
102 void resyncMatch();
103
104 public:
105 using Params = PL031Params;
106
111 PL031(const Params &p);
112
118 Tick read(PacketPtr pkt) override;
119
125 Tick write(PacketPtr pkt) override;
126
127 void serialize(CheckpointOut &cp) const override;
128 void unserialize(CheckpointIn &cp) override;
129};
130
131} // namespace gem5
132
133#endif // __DEV_ARM_RTC_PL031_HH__
This is a base class for AMBA devices that have to respond to Device and Implementer ID calls.
AmbaIntDevice(const Params &p, Addr pio_size)
uint32_t timeVal
Definition rtc_pl031.hh:69
bool rawInt
If timer has caused an interrupt.
Definition rtc_pl031.hh:84
bool pendingInt
If an interrupt is currently pending.
Definition rtc_pl031.hh:93
Tick read(PacketPtr pkt) override
Handle a read to the device.
Definition rtc_pl031.cc:65
Tick write(PacketPtr pkt) override
Handle writes to the device.
Definition rtc_pl031.cc:113
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition rtc_pl031.cc:187
PL031(const Params &p)
The constructor for RealView just registers itself with the MMU.
Definition rtc_pl031.cc:53
void counterMatch()
Called when the counter reaches matches.
Definition rtc_pl031.cc:173
EventFunctionWrapper matchEvent
Definition rtc_pl031.hh:97
uint32_t loadVal
Definition rtc_pl031.hh:75
void resyncMatch()
Called to update the matchEvent when the load Value or match value are written.
Definition rtc_pl031.cc:156
uint32_t matchVal
Definition rtc_pl031.hh:80
Tick lastWrittenTick
Definition rtc_pl031.hh:72
bool maskInt
If the timer interrupt mask that is anded with the raw interrupt to generate a pending interrupt.
Definition rtc_pl031.hh:89
PL031Params Params
Definition rtc_pl031.hh:105
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition rtc_pl031.cc:209
Bitfield< 0 > p
Copyright (c) 2024 Arm Limited All rights reserved.
Definition binary32.hh:36
std::ostream CheckpointOut
Definition serialize.hh:66
uint64_t Tick
Tick count type.
Definition types.hh:58
Packet * PacketPtr

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