#include <pcireg.h>

Public Attributes
uint16_t	vendor

uint16_t	device

uint16_t	command

uint16_t	status

uint8_t	revision

uint8_t	progIF

uint8_t	subClassCode

uint8_t	classCode

uint8_t	cacheLineSize

uint8_t	latencyTimer

uint8_t	headerType

uint8_t	bist

uint32_t	baseAddr [6]

uint32_t	cardbusCIS

uint16_t	subsystemVendorID

uint16_t	subsystemID

uint32_t	expansionROM

uint8_t	capabilityPtr

uint8_t	reserved [7]

uint8_t	interruptLine

uint8_t	interruptPin

uint8_t	minimumGrant

uint8_t	maximumLatency

Detailed Description

Definition at line 93 of file pcireg.h.

Member Data Documentation

◆ baseAddr

uint32_t PCIConfigType0::baseAddr[6]

Definition at line 107 of file pcireg.h.

◆ bist

uint8_t PCIConfigType0::bist

Definition at line 106 of file pcireg.h.

◆ cacheLineSize

uint8_t PCIConfigType0::cacheLineSize

Definition at line 103 of file pcireg.h.

◆ capabilityPtr

uint8_t PCIConfigType0::capabilityPtr

Definition at line 112 of file pcireg.h.

◆ cardbusCIS

uint32_t PCIConfigType0::cardbusCIS

Definition at line 108 of file pcireg.h.

◆ classCode

uint8_t PCIConfigType0::classCode

Definition at line 102 of file pcireg.h.

◆ command

uint16_t PCIConfigType0::command

Definition at line 97 of file pcireg.h.

◆ device

uint16_t PCIConfigType0::device

Definition at line 96 of file pcireg.h.

◆ expansionROM

uint32_t PCIConfigType0::expansionROM

Definition at line 111 of file pcireg.h.

◆ headerType

uint8_t PCIConfigType0::headerType

Definition at line 105 of file pcireg.h.

◆ interruptLine

uint8_t PCIConfigType0::interruptLine

Definition at line 117 of file pcireg.h.

◆ interruptPin

uint8_t PCIConfigType0::interruptPin

Definition at line 118 of file pcireg.h.

◆ latencyTimer

uint8_t PCIConfigType0::latencyTimer

Definition at line 104 of file pcireg.h.

◆ maximumLatency

uint8_t PCIConfigType0::maximumLatency

Definition at line 120 of file pcireg.h.

◆ minimumGrant

uint8_t PCIConfigType0::minimumGrant

Definition at line 119 of file pcireg.h.

◆ progIF

uint8_t PCIConfigType0::progIF

Definition at line 100 of file pcireg.h.

◆ reserved

uint8_t PCIConfigType0::reserved[7]

Definition at line 116 of file pcireg.h.

◆ revision

uint8_t PCIConfigType0::revision

Definition at line 99 of file pcireg.h.

◆ status

uint16_t PCIConfigType0::status

Definition at line 98 of file pcireg.h.

◆ subClassCode

uint8_t PCIConfigType0::subClassCode

Definition at line 101 of file pcireg.h.

◆ subsystemID

uint16_t PCIConfigType0::subsystemID

Definition at line 110 of file pcireg.h.

Referenced by gem5::PciVirtIO::PciVirtIO().

◆ subsystemVendorID

uint16_t PCIConfigType0::subsystemVendorID

Definition at line 109 of file pcireg.h.

◆ vendor

uint16_t PCIConfigType0::vendor

Definition at line 95 of file pcireg.h.

The documentation for this struct was generated from the following file:

dev/pci/pcireg.h

Public Attributes