gem5 [DEVELOP-FOR-25.0]
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tlm_to_gem5.cc
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1/*
2 * Copyright 2019 Google, Inc.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are
6 * met: redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer;
8 * redistributions in binary form must reproduce the above copyright
9 * notice, this list of conditions and the following disclaimer in the
10 * documentation and/or other materials provided with the distribution;
11 * neither the name of the copyright holders nor the names of its
12 * contributors may be used to endorse or promote products derived from
13 * this software without specific prior written permission.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
18 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
19 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
20 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
21 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 *
27 * Copyright (c) 2016, Dresden University of Technology (TU Dresden)
28 * All rights reserved.
29 *
30 * Redistribution and use in source and binary forms, with or without
31 * modification, are permitted provided that the following conditions are
32 * met:
33 *
34 * 1. Redistributions of source code must retain the above copyright notice,
35 * this list of conditions and the following disclaimer.
36 *
37 * 2. Redistributions in binary form must reproduce the above copyright
38 * notice, this list of conditions and the following disclaimer in the
39 * documentation and/or other materials provided with the distribution.
40 *
41 * 3. Neither the name of the copyright holder nor the names of its
42 * contributors may be used to endorse or promote products derived from
43 * this software without specific prior written permission.
44 *
45 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
46 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
47 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
48 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
49 * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
50 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
51 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
52 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
53 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
54 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
55 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
56 */
57
59
60#include <utility>
61
62#include "base/trace.hh"
63#include "debug/TlmBridge.hh"
64#include "params/TlmToGem5Bridge128.hh"
65#include "params/TlmToGem5Bridge256.hh"
66#include "params/TlmToGem5Bridge32.hh"
67#include "params/TlmToGem5Bridge512.hh"
68#include "params/TlmToGem5Bridge64.hh"
69#include "sim/core.hh"
70#include "sim/system.hh"
73
74using namespace gem5;
75
76namespace sc_gem5
77{
78
79namespace
80{
84std::vector<PayloadToPacketConversionStep> extraPayloadToPacketSteps;
85} // namespace
86
95void
97{
98 extraPayloadToPacketSteps.push_back(std::move(step));
99}
100
110{
111 Gem5SystemC::Gem5Extension *extension = nullptr;
112 trans.get_extension(extension);
113
114 // If there is an extension, this transaction was initiated by the gem5
115 // world and we can pipe through the original packet. Otherwise, we
116 // generate a new packet based on the transaction.
117 if (extension != nullptr) {
118 auto pkt = extension->getPacket();
119 // Sync the address which could have changed.
120 pkt->setAddr(trans.get_address());
121 // Apply all conversion steps necessary in this specific setup.
122 for (auto &step : extraPayloadToPacketSteps) {
123 step(pkt, trans);
124 }
125 return std::make_pair(pkt, false);
126 }
127
128 MemCmd cmd;
129 RequestPtr req;
130
131 Gem5SystemC::AtomicExtension *atomic_ex = nullptr;
132 trans.get_extension(atomic_ex);
133 if (atomic_ex) {
134 cmd = MemCmd::SwapReq;
135 Request::Flags flags = (atomic_ex->isReturnRequired() ?
139 atomic_ex->getAtomicOpFunctor()->clone());
140 // FIXME: correct the context_id and pc state.
141 req = std::make_shared<Request>(
142 trans.get_address(), trans.get_data_length(), flags, _id,
143 0, 0, std::move(amo_op));
144 req->setPaddr(trans.get_address());
145 } else {
146 switch (trans.get_command()) {
148 cmd = MemCmd::ReadReq;
149 break;
151 cmd = MemCmd::WriteReq;
152 break;
154 return std::make_pair(nullptr, false);
155 default:
156 SC_REPORT_FATAL("TlmToGem5Bridge",
157 "received transaction with unsupported "
158 "command");
159 }
160 Request::Flags flags;
161 req = std::make_shared<Request>(
162 trans.get_address(), trans.get_data_length(), flags, _id);
163 }
164
165
166 /*
167 * Allocate a new Packet. The packet will be deleted when it returns from
168 * the gem5 world as a response.
169 */
170 auto pkt = new Packet(req, cmd);
171 pkt->dataStatic(trans.get_data_ptr());
172
173 // Apply all conversion steps necessary in this specific setup.
174 for (auto &step : extraPayloadToPacketSteps) {
175 step(pkt, trans);
176 }
177
178 return std::make_pair(pkt, true);
179}
180
181void
183{
184 if (!pkt->isError()) {
186 } else if (pkt->isRead() || pkt->isWrite()) {
188 } else {
190 }
191}
192
193template <unsigned int BITWIDTH>
194void
196{
198 auto delay = sc_core::SC_ZERO_TIME;
199
200 auto status = socket->nb_transport_bw(trans, phase, delay);
202 "Unexpected status after sending END_REQ");
203}
204
205template <unsigned int BITWIDTH>
206void
208 sc_core::sc_time &delay)
209{
210 MemBackdoor::Flags flags;
211 switch (trans.get_command()) {
213 flags = MemBackdoor::Readable;
214 break;
217 break;
218 default:
219 panic("TlmToGem5Bridge: "
220 "received transaction with unsupported command");
221 }
222 Addr start_addr = trans.get_address();
223 Addr length = trans.get_data_length();
224
225 MemBackdoorReq req({start_addr, start_addr + length}, flags);
226 MemBackdoorPtr backdoor = nullptr;
227
228 bmp.sendMemBackdoorReq(req, backdoor);
229
230 if (backdoor)
231 trans.set_dmi_allowed(true);
232
234
235 auto status = socket->nb_transport_bw(trans, phase, delay);
236
237 if (status == tlm::TLM_COMPLETED ||
238 (status == tlm::TLM_UPDATED && phase == tlm::END_RESP)) {
239 // transaction completed -> no need to wait for tlm::END_RESP
240 responseInProgress = false;
241 } else if (status == tlm::TLM_ACCEPTED) {
242 // we need to wait for tlm::END_RESP
243 responseInProgress = true;
244 } else {
245 panic("Unexpected status after sending BEGIN_RESP");
246 }
247}
248
249template <unsigned int BITWIDTH>
250void
252{
254 sc_assert(pendingRequest == nullptr);
255 sc_assert(pendingPacket == nullptr);
256
257 trans.acquire();
258
259 auto res = payload2packet(_id, trans);
260 auto pkt = res.first;
261 pkt->pushSenderState(new Gem5SystemC::TlmSenderState(trans));
262
263 // If the packet doesn't need a response, we should send BEGIN_RESP by
264 // ourselves.
265 bool needsResponse = pkt->needsResponse();
266 if (bmp.sendTimingReq(pkt)) { // port is free -> send END_REQ immediately
267 sendEndReq(trans);
268 if (!needsResponse) {
269 auto delay = sc_core::SC_ZERO_TIME;
270 setPayloadResponse(trans, pkt);
271 sendBeginResp(trans, delay);
272 }
273 trans.release();
274 } else { // port is blocked -> wait for retry before sending END_REQ
275 waitForRetry = true;
276 pendingRequest = &trans;
277 pendingPacket = pkt;
278 }
279}
280
281template <unsigned int BITWIDTH>
282void
284{
286
287 responseInProgress = false;
288
289 if (needToSendRetry) {
290 bmp.sendRetryResp();
291 needToSendRetry = false;
292 }
293}
294
295template <unsigned int BITWIDTH>
296void
301
302template <unsigned int BITWIDTH>
303void
305{
306 if (backdoor == nullptr) return;
307
308 // We only need to register the callback at the first time.
309 if (requestedBackdoors.find(backdoor) == requestedBackdoors.end()) {
310 backdoor->addInvalidationCallback(
311 [this](const MemBackdoor &backdoor)
312 {
313 invalidateDmi(backdoor);
314 }
315 );
316 requestedBackdoors.emplace(backdoor);
317 }
318}
319
320template <unsigned int BITWIDTH>
321void
323{
324 socket->invalidate_direct_mem_ptr(
325 backdoor.range().start(), backdoor.range().end());
326 requestedBackdoors.erase(const_cast<gem5::MemBackdoorPtr>(&backdoor));
327}
328
329template <unsigned int BITWIDTH>
330void
332 const tlm::tlm_phase &phase)
333{
334 switch (phase) {
335 case tlm::BEGIN_REQ:
336 handleBeginReq(trans);
337 break;
338 case tlm::END_RESP:
339 handleEndResp(trans);
340 break;
341 default:
342 panic("unimplemented phase in callback");
343 }
344}
345
346template <unsigned int BITWIDTH>
350 sc_core::sc_time &delay)
351{
352 unsigned len = trans.get_data_length();
353 unsigned char *byteEnable = trans.get_byte_enable_ptr();
354 unsigned width = trans.get_streaming_width();
355
356 // check the transaction attributes for unsupported features ...
357 if (byteEnable != 0) {
359 return tlm::TLM_COMPLETED;
360 }
361 if (width < len) { // is this a burst request?
363 return tlm::TLM_COMPLETED;
364 }
365
366 // ... and queue the valid transaction
367 trans.acquire();
368 peq.notify(trans, phase, delay);
369 return tlm::TLM_ACCEPTED;
370}
371
372template <unsigned int BITWIDTH>
373void
376{
377 auto [pkt, pkt_created] = payload2packet(_id, trans);
378 pkt->pushSenderState(new Gem5SystemC::TlmSenderState(trans));
379
380 MemBackdoorPtr backdoor = nullptr;
381 Tick ticks = 0;
382
383 // Check if we have a backdoor meet the request. If yes, we can just hints
384 // the requestor the DMI is supported.
385 for (auto& b : requestedBackdoors) {
386 if (pkt->getAddrRange().isSubset(b->range()) &&
387 ((!pkt->isWrite() && b->readable()) ||
388 (pkt->isWrite() && b->writeable()))) {
389 backdoor = b;
390 }
391 }
392
393 if (backdoor) {
394 ticks = bmp.sendAtomic(pkt);
395 } else {
396 ticks = bmp.sendAtomicBackdoor(pkt, backdoor);
397 }
398
399 // Hints the requestor the DMI is supported.
400 if (backdoor) {
401 trans.set_dmi_allowed(true);
402 cacheBackdoor(backdoor);
403 }
404
405 // send an atomic request to gem5
406 panic_if(pkt->needsResponse() && !pkt->isResponse(),
407 "Packet sending failed!\n");
408
409 auto delay =
410 sc_core::sc_time((double)(ticks / sim_clock::as_int::ps),
412
413 // update time
414 t += delay;
415
416 gem5::Packet::SenderState *senderState = pkt->popSenderState();
417 sc_assert(
418 nullptr != dynamic_cast<Gem5SystemC::TlmSenderState*>(senderState));
419
420 // clean up
421 delete senderState;
422
423 setPayloadResponse(trans, pkt);
424
425 if (pkt_created)
426 destroyPacket(pkt);
427}
428
429template <unsigned int BITWIDTH>
430unsigned int
432{
433 auto [pkt, pkt_created] = payload2packet(_id, trans);
434 if (pkt != nullptr) {
435 pkt->pushSenderState(new Gem5SystemC::TlmSenderState(trans));
436
437 bmp.sendFunctional(pkt);
438 setPayloadResponse(trans, pkt);
439
440 gem5::Packet::SenderState *senderState = pkt->popSenderState();
441 sc_assert(
442 nullptr != dynamic_cast<Gem5SystemC::TlmSenderState*>(senderState));
443
444 // clean up
445 delete senderState;
446
447 if (pkt_created)
448 destroyPacket(pkt);
449 }
450
451 return trans.get_data_length();
452}
453
454template <unsigned int BITWIDTH>
455bool
457 tlm::tlm_dmi &dmi_data)
458{
459 MemBackdoor::Flags flags;
460 switch (trans.get_command()) {
462 flags = MemBackdoor::Readable;
463 break;
466 break;
467 default:
468 panic("TlmToGem5Bridge: "
469 "received transaction with unsupported command");
470 }
471 Addr start_addr = trans.get_address();
472 Addr length = trans.get_data_length();
473
474 MemBackdoorReq req({start_addr, start_addr + length}, flags);
475 MemBackdoorPtr backdoor = nullptr;
476
477 bmp.sendMemBackdoorReq(req, backdoor);
478
479 if (backdoor) {
480 trans.set_dmi_allowed(true);
481 dmi_data.set_dmi_ptr(backdoor->ptr());
482 dmi_data.set_start_address(backdoor->range().start());
483 dmi_data.set_end_address(backdoor->range().end());
484
485 typedef tlm::tlm_dmi::dmi_access_e access_t;
486 access_t access = tlm::tlm_dmi::DMI_ACCESS_NONE;
487 if (backdoor->readable())
488 access = (access_t)(access | tlm::tlm_dmi::DMI_ACCESS_READ);
489 if (backdoor->writeable())
490 access = (access_t)(access | tlm::tlm_dmi::DMI_ACCESS_WRITE);
491 dmi_data.set_granted_access(access);
492 cacheBackdoor(backdoor);
493 }
494
496
497 return backdoor != nullptr;
498}
499
500template <unsigned int BITWIDTH>
501bool
503{
504 // exclusion rule
505 // We need to Wait for END_RESP before sending next BEGIN_RESP
506 if (responseInProgress) {
508 needToSendRetry = true;
509 return false;
510 }
511
512 sc_assert(pkt->isResponse());
513
514 /*
515 * Pay for annotated transport delays.
516 *
517 * See recvTimingReq in sc_slave_port.cc for a detailed description.
518 */
519 auto delay = sc_core::sc_time::from_value(pkt->headerDelay);
520 // reset the delays
521 pkt->payloadDelay = 0;
522 pkt->headerDelay = 0;
523
524 auto *tlmSenderState =
525 dynamic_cast<Gem5SystemC::TlmSenderState*>(pkt->popSenderState());
526 sc_assert(tlmSenderState != nullptr);
527
528 auto &trans = tlmSenderState->trans;
529 setPayloadResponse(trans, pkt);
530 sendBeginResp(trans, delay);
531
532 Gem5SystemC::Gem5Extension *extension = nullptr;
533 trans.get_extension(extension);
534
535 // clean up
536 delete tlmSenderState;
537
538 // If there is an extension the packet was piped through and we must not
539 // delete it. The packet travels back with the transaction.
540 if (extension == nullptr)
541 destroyPacket(pkt);
542
543 trans.release();
544
545 return true;
546}
547
548template <unsigned int BITWIDTH>
549void
551{
553 sc_assert(pendingRequest != nullptr);
554 sc_assert(pendingPacket != nullptr);
555
556 // If the packet doesn't need a response, we should send BEGIN_RESP by
557 // ourselves.
558 bool needsResponse = pendingPacket->needsResponse();
559 if (bmp.sendTimingReq(pendingPacket)) {
560 waitForRetry = false;
561
562 auto &trans = *pendingRequest;
563 sendEndReq(trans);
564 if (!needsResponse) {
565 auto delay = sc_core::SC_ZERO_TIME;
567 sendBeginResp(trans, delay);
568 }
569 trans.release();
570
571 pendingRequest = nullptr;
572 pendingPacket = nullptr;
573 }
574}
575
576template <unsigned int BITWIDTH>
577void
579{
580 DPRINTF(TlmBridge,
581 "received address range change but ignored it");
582}
583
584template <unsigned int BITWIDTH>
586TlmToGem5Bridge<BITWIDTH>::gem5_getPort(const std::string &if_name, int idx)
587{
588 if (if_name == "gem5")
589 return bmp;
590 else if (if_name == "tlm")
591 return wrapper;
592
593 return sc_core::sc_module::gem5_getPort(if_name, idx);
594}
595
596template <unsigned int BITWIDTH>
598 const Params &params, const sc_core::sc_module_name &mn) :
599 TlmToGem5BridgeBase(mn), peq(this, &TlmToGem5Bridge<BITWIDTH>::peq_cb),
600 waitForRetry(false), pendingRequest(nullptr), pendingPacket(nullptr),
601 needToSendRetry(false), responseInProgress(false),
602 bmp(std::string(name()) + "master", *this), socket("tlm_socket"),
603 wrapper(socket, std::string(name()) + ".tlm", InvalidPortID),
604 system(params.system),
605 _id(params.system->getGlobalRequestorId(
606 std::string("[systemc].") + name()))
607{
608}
609
610template <unsigned int BITWIDTH>
611void
613{
614 /*
615 * Register the TLM non-blocking interface when using gem5 Timing mode and
616 * the TLM blocking interface when using the gem5 Atomic mode.
617 * Then the magic (TM) in simple_target_socket automatically transforms
618 * non-blocking in blocking transactions and vice versa.
619 *
620 * NOTE: The mode may change during execution.
621 */
622 if (system->isTimingMode()) {
623 DPRINTF(TlmBridge, "register non-blocking interface");
624 socket.register_nb_transport_fw(
626 } else if (system->isAtomicMode()) {
627 DPRINTF(TlmBridge, "register blocking interface");
628 socket.register_b_transport(
630 } else {
631 panic("gem5 operates neither in Timing nor in Atomic mode");
632 }
633
634 socket.register_get_direct_mem_ptr(
636 socket.register_transport_dbg(
638
640}
641
642} // namespace sc_gem5
643
645gem5::TlmToGem5Bridge32Params::create() const
646{
648 *this, sc_core::sc_module_name(name.c_str()));
649}
650
652gem5::TlmToGem5Bridge64Params::create() const
653{
655 *this, sc_core::sc_module_name(name.c_str()));
656}
657
659gem5::TlmToGem5Bridge128Params::create() const
660{
662 *this, sc_core::sc_module_name(name.c_str()));
663}
664
666gem5::TlmToGem5Bridge256Params::create() const
667{
669 *this, sc_core::sc_module_name(name.c_str()));
670}
671
673gem5::TlmToGem5Bridge512Params::create() const
674{
676 *this, sc_core::sc_module_name(name.c_str()));
677}
#define DPRINTF(x,...)
Definition trace.hh:209
bool isReturnRequired() const
Definition sc_ext.cc:188
gem5::AtomicOpFunctor * getAtomicOpFunctor() const
Definition sc_ext.cc:194
gem5::PacketPtr getPacket()
Definition sc_ext.cc:135
const AddrRange & range() const
Definition backdoor.hh:58
void addInvalidationCallback(CbFunction func)
Definition backdoor.hh:103
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition packet.hh:295
bool isRead() const
Definition packet.hh:593
bool isError() const
Definition packet.hh:622
bool isResponse() const
Definition packet.hh:598
void setAddr(Addr _addr)
Update the address of this packet mid-transaction.
Definition packet.hh:815
uint32_t payloadDelay
The extra pipelining delay from seeing the packet until the end of payload is transmitted by the comp...
Definition packet.hh:449
uint32_t headerDelay
The extra delay from seeing the packet until the header is transmitted.
Definition packet.hh:431
SenderState * popSenderState()
Pop the top of the state stack and return a pointer to it.
Definition packet.cc:342
bool isWrite() const
Definition packet.hh:594
Ports are used to interface objects to each other.
Definition port.hh:62
@ ATOMIC_RETURN_OP
The request is an atomic that returns data.
Definition request.hh:175
@ ATOMIC_NO_RETURN_OP
The request is an atomic that does not return data.
Definition request.hh:177
gem5::Flags< FlagsType > Flags
Definition request.hh:102
virtual void before_end_of_elaboration()
Definition sc_module.hh:252
virtual gem5::Port & gem5_getPort(const std::string &if_name, int idx=-1)
Definition sc_module.cc:117
const char * name() const
Definition sc_object.cc:44
static sc_time from_value(sc_dt::uint64)
Definition sc_time.cc:210
std::unordered_set< gem5::MemBackdoorPtr > requestedBackdoors
void destroyPacket(gem5::PacketPtr pkt)
void handleEndResp(tlm::tlm_generic_payload &trans)
bool get_direct_mem_ptr(tlm::tlm_generic_payload &trans, tlm::tlm_dmi &dmi_data)
void sendBeginResp(tlm::tlm_generic_payload &trans, sc_core::sc_time &delay)
void invalidateDmi(const gem5::MemBackdoor &backdoor)
BridgeRequestPort bmp
void b_transport(tlm::tlm_generic_payload &trans, sc_core::sc_time &t)
tlm::tlm_generic_payload * pendingRequest
tlm::tlm_sync_enum nb_transport_fw(tlm::tlm_generic_payload &trans, tlm::tlm_phase &phase, sc_core::sc_time &t)
void cacheBackdoor(gem5::MemBackdoorPtr backdoor)
sc_gem5::TlmTargetWrapper< BITWIDTH > wrapper
unsigned int transport_dbg(tlm::tlm_generic_payload &trans)
void sendEndReq(tlm::tlm_generic_payload &trans)
void handleBeginReq(tlm::tlm_generic_payload &trans)
gem5::PacketPtr pendingPacket
gem5::Port & gem5_getPort(const std::string &if_name, int idx=-1) override
const gem5::RequestorID _id
tlm_utils::peq_with_cb_and_phase< TlmToGem5Bridge< BITWIDTH > > peq
void peq_cb(tlm::tlm_generic_payload &trans, const tlm::tlm_phase &phase)
TlmToGem5Bridge(const Params &p, const sc_core::sc_module_name &mn)
void before_end_of_elaboration() override
bool recvTimingResp(gem5::PacketPtr pkt)
gem5::TlmToGem5BridgeBaseParams Params
tlm_utils::simple_target_socket< TlmToGem5Bridge< BITWIDTH >, BITWIDTH > socket
STL pair class.
Definition stl.hh:58
void set_granted_access(dmi_access_e a)
Definition dmi.hh:86
@ DMI_ACCESS_WRITE
Definition dmi.hh:40
@ DMI_ACCESS_NONE
Definition dmi.hh:38
@ DMI_ACCESS_READ
Definition dmi.hh:39
void set_dmi_ptr(unsigned char *p)
Definition dmi.hh:81
void set_start_address(sc_dt::uint64 addr)
Definition dmi.hh:82
void set_end_address(sc_dt::uint64 addr)
Definition dmi.hh:83
unsigned char * get_data_ptr() const
Definition gp.hh:188
void set_dmi_allowed(bool dmi_allowed)
Definition gp.hh:239
void set_response_status(const tlm_response_status response_status)
Definition gp.hh:204
unsigned char * get_byte_enable_ptr() const
Definition gp.hh:219
sc_dt::uint64 get_address() const
Definition gp.hh:184
void get_extension(T *&ext) const
Definition gp.hh:364
unsigned int get_streaming_width() const
Definition gp.hh:211
unsigned int get_data_length() const
Definition gp.hh:192
tlm_command get_command() const
Definition gp.hh:180
Addr end() const
Get the end address of the range.
Addr start() const
Get the start address of the range.
virtual AtomicOpFunctor * clone()=0
std::unique_ptr< AtomicOpFunctor > AtomicOpFunctorPtr
Definition amo.hh:269
#define panic(...)
This implements a cprintf based panic() function.
Definition logging.hh:220
#define panic_if(cond,...)
Conditional panic macro that checks the supplied condition and only panics if the condition is true a...
Definition logging.hh:246
Bitfield< 18, 16 > len
Bitfield< 4 > width
Definition misc_types.hh:72
Bitfield< 5 > t
Definition misc_types.hh:71
Bitfield< 7 > b
Bitfield< 5, 0 > status
Tick ps
picosecond
Definition core.cc:69
Copyright (c) 2024 Arm Limited All rights reserved.
Definition binary32.hh:36
std::shared_ptr< Request > RequestPtr
Definition request.hh:94
const PortID InvalidPortID
Definition types.hh:246
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition types.hh:147
MemBackdoor * MemBackdoorPtr
Definition backdoor.hh:127
uint64_t Tick
Tick count type.
Definition types.hh:58
uint16_t RequestorID
Definition request.hh:95
Packet * PacketPtr
const sc_time SC_ZERO_TIME
Definition sc_time.cc:290
@ SC_PS
Definition sc_time.hh:42
void addPayloadToPacketConversionStep(PayloadToPacketConversionStep step)
Notify the Tlm2Gem5 bridge that we need an extra step to properly convert a tlm payload to gem5 packe...
void setPayloadResponse(tlm::tlm_generic_payload &trans, PacketPtr pkt)
std::function< void(gem5::PacketPtr pkt, tlm::tlm_generic_payload &trans)> PayloadToPacketConversionStep
std::pair< PacketPtr, bool > payload2packet(RequestorID _id, tlm::tlm_generic_payload &trans)
Convert a TLM payload to gem5 packet by copying all the relevant information to new packet.
Overload hash function for BasicBlockRange type.
Definition binary32.hh:81
@ BEGIN_RESP
Definition phase.hh:43
@ END_RESP
Definition phase.hh:44
@ BEGIN_REQ
Definition phase.hh:41
@ END_REQ
Definition phase.hh:42
@ TLM_READ_COMMAND
Definition gp.hh:84
@ TLM_IGNORE_COMMAND
Definition gp.hh:86
@ TLM_WRITE_COMMAND
Definition gp.hh:85
@ TLM_ADDRESS_ERROR_RESPONSE
Definition gp.hh:94
@ TLM_OK_RESPONSE
Definition gp.hh:91
@ TLM_BURST_ERROR_RESPONSE
Definition gp.hh:96
@ TLM_BYTE_ENABLE_ERROR_RESPONSE
Definition gp.hh:97
@ TLM_COMMAND_ERROR_RESPONSE
Definition gp.hh:95
tlm_sync_enum
Definition fw_bw_ifs.hh:31
@ TLM_COMPLETED
Definition fw_bw_ifs.hh:31
@ TLM_ACCEPTED
Definition fw_bw_ifs.hh:31
@ TLM_UPDATED
Definition fw_bw_ifs.hh:31
#define SC_REPORT_FATAL(msg_type, msg)
#define sc_assert(expr)
A virtual base opaque structure used to hold state associated with the packet (e.g....
Definition packet.hh:469
const std::string & name()
Definition trace.cc:48

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