x86_traits.hh File Reference

#include <cassert>
#include "base/types.hh"

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Namespaces
namespace	gem5
	Copyright (c) 2024 Arm Limited All rights reserved.
namespace	gem5::X86ISA
	This is exposed globally, independent of the ISA.

Functions
static Addr	gem5::X86ISA::x86IOAddress (const uint32_t port)
static Addr	gem5::X86ISA::x86PciConfigAddress (const uint32_t addr)
static Addr	gem5::X86ISA::x86LocalAPICAddress (const uint8_t id, const uint16_t addr)
static Addr	gem5::X86ISA::x86InterruptAddress (const uint8_t id, const uint16_t addr)

Variables
const int	gem5::X86ISA::NumMicroIntRegs = 16
const int	gem5::X86ISA::NumMMXRegs = 8
const int	gem5::X86ISA::NumXMMRegs = 16
const int	gem5::X86ISA::NumMicroFpRegs = 8
const int	gem5::X86ISA::NumCRegs = 16
const int	gem5::X86ISA::NumDRegs = 8
const int	gem5::X86ISA::NumXCRegs = 1
const int	gem5::X86ISA::NumSegments = 6
const int	gem5::X86ISA::NumSysSegments = 4
const Addr	gem5::X86ISA::IntAddrPrefixMask = 0xffffffff00000000ULL
const Addr	gem5::X86ISA::IntAddrPrefixCPUID = 0x100000000ULL
const Addr	gem5::X86ISA::IntAddrPrefixMSR = 0x200000000ULL
const Addr	gem5::X86ISA::IntAddrPrefixIO = 0x300000000ULL
const Addr	gem5::X86ISA::PhysAddrPrefixIO = 0x8000000000000000ULL
const Addr	gem5::X86ISA::PhysAddrPrefixPciConfig = 0xC000000000000000ULL
const Addr	gem5::X86ISA::PhysAddrPrefixLocalAPIC = 0x2000000000000000ULL
const Addr	gem5::X86ISA::PhysAddrPrefixInterrupts = 0xA000000000000000ULL
const Addr	gem5::X86ISA::PhysAddrAPICRangeSize = 1 << 12
const Addr	gem5::X86ISA::PhysAddrIntA = 0x8000000100000000ULL