sdma_mmio.hh File Reference

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Macros
#define	mmSDMA_GFX_RB_CNTL   0x0080
	MMIO offsets for SDMA engine.
#define	mmSDMA_GFX_RB_BASE   0x0081
#define	mmSDMA_GFX_RB_BASE_HI   0x0082
#define	mmSDMA_GFX_RB_RPTR_ADDR_HI   0x0088
#define	mmSDMA_GFX_RB_RPTR_ADDR_LO   0x0089
#define	mmSDMA_GFX_DOORBELL   0x0092
#define	mmSDMA_GFX_DOORBELL_OFFSET   0x00ab
#define	mmSDMA_GFX_RB_WPTR_POLL_ADDR_HI   0x00b2
#define	mmSDMA_GFX_RB_WPTR_POLL_ADDR_LO   0x00b3
#define	mmSDMA_PAGE_RB_CNTL   0x00e0
#define	mmSDMA_PAGE_RB_BASE   0x00e1
#define	mmSDMA_PAGE_RB_RPTR_ADDR_HI   0x00e8
#define	mmSDMA_PAGE_RB_RPTR_ADDR_LO   0x00e9
#define	mmSDMA_PAGE_DOORBELL   0x00f2
#define	mmSDMA_PAGE_DOORBELL_OFFSET   0x010b
#define	mmSDMA_PAGE_RB_WPTR_POLL_ADDR_LO   0x0113

Macro Definition Documentation

mmSDMA_GFX_DOORBELL

#define mmSDMA_GFX_DOORBELL   0x0092

Definition at line 49 of file sdma_mmio.hh.

Referenced by gem5::SDMAEngine::writeMMIO().

mmSDMA_GFX_DOORBELL_OFFSET

#define mmSDMA_GFX_DOORBELL_OFFSET   0x00ab

Definition at line 50 of file sdma_mmio.hh.

Referenced by gem5::SDMAEngine::writeMMIO().

mmSDMA_GFX_RB_BASE

#define mmSDMA_GFX_RB_BASE   0x0081

Definition at line 45 of file sdma_mmio.hh.

Referenced by gem5::SDMAEngine::writeMMIO().

mmSDMA_GFX_RB_BASE_HI

#define mmSDMA_GFX_RB_BASE_HI   0x0082

Definition at line 46 of file sdma_mmio.hh.

Referenced by gem5::SDMAEngine::writeMMIO().

mmSDMA_GFX_RB_CNTL

#define mmSDMA_GFX_RB_CNTL   0x0080

MMIO offsets for SDMA engine.

These values were taken from the linux header for SDMA. The header files can be found here:

https://github.com/RadeonOpenCompute/ROCK-Kernel-Driver/blob/roc-4.3.x/ drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_offset.h https://github.com/RadeonOpenCompute/ROCK-Kernel-Driver/blob/roc-4.3.x/ drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_offset.h

Definition at line 44 of file sdma_mmio.hh.

Referenced by gem5::SDMAEngine::writeMMIO().

mmSDMA_GFX_RB_RPTR_ADDR_HI

#define mmSDMA_GFX_RB_RPTR_ADDR_HI   0x0088

Definition at line 47 of file sdma_mmio.hh.

Referenced by gem5::SDMAEngine::writeMMIO().

mmSDMA_GFX_RB_RPTR_ADDR_LO

#define mmSDMA_GFX_RB_RPTR_ADDR_LO   0x0089

Definition at line 48 of file sdma_mmio.hh.

Referenced by gem5::SDMAEngine::writeMMIO().

mmSDMA_GFX_RB_WPTR_POLL_ADDR_HI

#define mmSDMA_GFX_RB_WPTR_POLL_ADDR_HI   0x00b2

Definition at line 51 of file sdma_mmio.hh.

Referenced by gem5::SDMAEngine::writeMMIO().

mmSDMA_GFX_RB_WPTR_POLL_ADDR_LO

#define mmSDMA_GFX_RB_WPTR_POLL_ADDR_LO   0x00b3

Definition at line 52 of file sdma_mmio.hh.

Referenced by gem5::SDMAEngine::writeMMIO().

mmSDMA_PAGE_DOORBELL

#define mmSDMA_PAGE_DOORBELL   0x00f2

Definition at line 57 of file sdma_mmio.hh.

Referenced by gem5::SDMAEngine::writeMMIO().

mmSDMA_PAGE_DOORBELL_OFFSET

#define mmSDMA_PAGE_DOORBELL_OFFSET   0x010b

Definition at line 58 of file sdma_mmio.hh.

Referenced by gem5::SDMAEngine::writeMMIO().

mmSDMA_PAGE_RB_BASE

#define mmSDMA_PAGE_RB_BASE   0x00e1

Definition at line 54 of file sdma_mmio.hh.

Referenced by gem5::SDMAEngine::writeMMIO().

mmSDMA_PAGE_RB_CNTL

#define mmSDMA_PAGE_RB_CNTL   0x00e0

Definition at line 53 of file sdma_mmio.hh.

Referenced by gem5::SDMAEngine::writeMMIO().

mmSDMA_PAGE_RB_RPTR_ADDR_HI

#define mmSDMA_PAGE_RB_RPTR_ADDR_HI   0x00e8

Definition at line 55 of file sdma_mmio.hh.

Referenced by gem5::SDMAEngine::writeMMIO().

mmSDMA_PAGE_RB_RPTR_ADDR_LO

#define mmSDMA_PAGE_RB_RPTR_ADDR_LO   0x00e9

Definition at line 56 of file sdma_mmio.hh.

Referenced by gem5::SDMAEngine::writeMMIO().

mmSDMA_PAGE_RB_WPTR_POLL_ADDR_LO

#define mmSDMA_PAGE_RB_WPTR_POLL_ADDR_LO   0x0113

Definition at line 59 of file sdma_mmio.hh.

Referenced by gem5::SDMAEngine::writeMMIO().