#include <pcireg.h>
Definition at line 123 of file pcireg.h.
◆ baseAddr
| uint32_t PCIConfigType1::baseAddr[2] |
◆ bist
| uint8_t PCIConfigType1::bist |
◆ bridgeControl
| uint16_t PCIConfigType1::bridgeControl |
◆ cacheLineSize
| uint8_t PCIConfigType1::cacheLineSize |
◆ capabilityPtr
| uint8_t PCIConfigType1::capabilityPtr |
◆ classCode
| uint8_t PCIConfigType1::classCode |
◆ command
| uint16_t PCIConfigType1::command |
◆ device
| uint16_t PCIConfigType1::device |
◆ expansionROM
| uint32_t PCIConfigType1::expansionROM |
◆ headerType
| uint8_t PCIConfigType1::headerType |
◆ interruptLine
| uint8_t PCIConfigType1::interruptLine |
◆ interruptPin
| uint8_t PCIConfigType1::interruptPin |
◆ ioBase
| uint8_t PCIConfigType1::ioBase |
◆ ioBaseUpper
| uint16_t PCIConfigType1::ioBaseUpper |
◆ ioLimit
| uint8_t PCIConfigType1::ioLimit |
◆ ioLimitUpper
| uint16_t PCIConfigType1::ioLimitUpper |
◆ memBase
| uint16_t PCIConfigType1::memBase |
◆ memLimit
| uint16_t PCIConfigType1::memLimit |
◆ prefetchBaseUpper
| uint32_t PCIConfigType1::prefetchBaseUpper |
◆ prefetchLimitUpper
| uint32_t PCIConfigType1::prefetchLimitUpper |
◆ prefetchMemBase
| uint16_t PCIConfigType1::prefetchMemBase |
◆ prefetchMemLimit
| uint16_t PCIConfigType1::prefetchMemLimit |
◆ primaryBusNum
| uint8_t PCIConfigType1::primaryBusNum |
◆ primaryLatencyTimer
| uint8_t PCIConfigType1::primaryLatencyTimer |
◆ progIF
| uint8_t PCIConfigType1::progIF |
◆ reserved
| uint8_t PCIConfigType1::reserved[3] |
◆ revision
| uint8_t PCIConfigType1::revision |
◆ secondaryBusNum
| uint8_t PCIConfigType1::secondaryBusNum |
◆ secondaryLatencyTimer
| uint8_t PCIConfigType1::secondaryLatencyTimer |
◆ secondaryStatus
| uint16_t PCIConfigType1::secondaryStatus |
◆ status
| uint16_t PCIConfigType1::status |
◆ subClassCode
| uint8_t PCIConfigType1::subClassCode |
◆ subordinateBusNum
| uint8_t PCIConfigType1::subordinateBusNum |
◆ vendor
| uint16_t PCIConfigType1::vendor |
The documentation for this struct was generated from the following file: