gem5  v19.0.0.0
X86ISA::GpuTLB Member List

This is the complete list of members for X86ISA::GpuTLB, including all inherited members.

_currPwrStateClockedObjectprotected
_paramsSimObjectprotected
accessCyclesX86ISA::GpuTLB
accessDistanceX86ISA::GpuTLBprotected
AccessPatternTable typedefX86ISA::GpuTLB
addStat(Stats::Info *info)Stats::Group
addStatGroup(const char *name, Group *block)Stats::Group
allocationPolicyX86ISA::GpuTLBprotected
assocX86ISA::GpuTLBprotected
avgReuseDistanceX86ISA::GpuTLB
ckptCountSerializablestatic
ckptMaxCountSerializablestatic
ckptPrevCountSerializablestatic
cleanup()X86ISA::GpuTLB
cleanupEventX86ISA::GpuTLB
cleanupQueueX86ISA::GpuTLB
clockX86ISA::GpuTLBprotected
Clocked(ClockDomain &clk_domain)Clockedinlineprotected
Clocked(Clocked &)=deleteClockedprotected
clockEdge(Cycles cycles=Cycles(0)) constClockedinline
ClockedObject(const ClockedObjectParams *p)ClockedObject
clockPeriod() constClockedinline
clockPeriodUpdated()Clockedinlineprotectedvirtual
computeStats()ClockedObject
configAddressX86ISA::GpuTLBprotected
cpuSidePortX86ISA::GpuTLB
curCycle() constX86ISA::GpuTLBinline
currentSection()Serializablestatic
cyclesToTicks(Cycles c) constClockedinline
demapPage(Addr va, uint64_t asn)X86ISA::GpuTLB
deschedule(Event &event)EventManagerinline
deschedule(Event *event)EventManagerinline
doMmuRegRead(ThreadContext *tc, Packet *pkt)X86ISA::GpuTLB
doMmuRegWrite(ThreadContext *tc, Packet *pkt)X86ISA::GpuTLB
drain() overrideSimObjectinlinevirtual
Drainable()Drainableprotected
drainResume()Drainableinlineprotectedvirtual
drainState() constDrainableinline
dumpAll()X86ISA::GpuTLB
EntryList typedefX86ISA::GpuTLBprotected
entryListX86ISA::GpuTLBprotected
EventManager(EventManager &em)EventManagerinline
EventManager(EventManager *em)EventManagerinline
EventManager(EventQueue *eq)EventManagerinline
eventqEventManagerprotected
eventQueue() constEventManagerinline
exitCallback()X86ISA::GpuTLB
exitEventX86ISA::GpuTLB
FAX86ISA::GpuTLBprotected
find(const char *name)SimObjectstatic
freeListX86ISA::GpuTLBprotected
frequency() constX86ISA::GpuTLBinline
getPort(const std::string &if_name, PortID idx=InvalidPortID) overrideX86ISA::GpuTLBvirtual
getProbeManager()SimObject
getStatGroups() constStats::Group
getStats() constStats::Group
getWalker()X86ISA::GpuTLB
globalNumTLBAccessesX86ISA::GpuTLB
globalNumTLBHitsX86ISA::GpuTLB
globalNumTLBMissesX86ISA::GpuTLB
globalTLBMissRateX86ISA::GpuTLB
GpuTLB(const Params *p)X86ISA::GpuTLB
Group()=deleteStats::Group
Group(const Group &)=deleteStats::Group
Group(Group *parent, const char *name=nullptr)Stats::Group
handleFuncTranslationReturn(PacketPtr pkt, tlbOutcome outcome)X86ISA::GpuTLB
handleTranslationReturn(Addr addr, tlbOutcome outcome, PacketPtr pkt)X86ISA::GpuTLB
hasMemSidePortX86ISA::GpuTLBprotected
hitLatencyX86ISA::GpuTLB
init()SimObjectvirtual
initState()SimObjectvirtual
insert(Addr vpn, TlbEntry &entry)X86ISA::GpuTLB
invalidateAll()X86ISA::GpuTLB
invalidateNonGlobal()X86ISA::GpuTLB
issueTLBLookup(PacketPtr pkt)X86ISA::GpuTLB
issueTranslation()X86ISA::GpuTLB
loadState(CheckpointIn &cp)SimObjectvirtual
localCyclesX86ISA::GpuTLB
localLatencyX86ISA::GpuTLB
localNumTLBAccessesX86ISA::GpuTLB
localNumTLBHitsX86ISA::GpuTLB
localNumTLBMissesX86ISA::GpuTLB
localTLBMissRateX86ISA::GpuTLB
lookup(Addr va, bool update_lru=true)X86ISA::GpuTLB
lookupIt(Addr va, bool update_lru=true)X86ISA::GpuTLBprotected
maxCoalescedReqsX86ISA::GpuTLB
memInvalidate()SimObjectinlinevirtual
memSidePortX86ISA::GpuTLB
memWriteback()SimObjectinlinevirtual
MISS_RETURN enum valueX86ISA::GpuTLB
missLatency1X86ISA::GpuTLB
missLatency2X86ISA::GpuTLB
Mode typedefX86ISA::GpuTLB
name() constSimObjectinlinevirtual
nextCycle() constClockedinline
notifyFork()Drainableinlinevirtual
numSetsX86ISA::GpuTLBprotected
numUniquePagesX86ISA::GpuTLB
SimObject::operator=(const Group &)=deleteStats::Group
Clocked::operator=(Clocked &)=deleteClockedprotected
outstandingReqsX86ISA::GpuTLB
PAGE_WALK enum valueX86ISA::GpuTLB
pageTableCyclesX86ISA::GpuTLB
pagingProtectionChecks(ThreadContext *tc, PacketPtr pkt, TlbEntry *tlb_entry, Mode mode)X86ISA::GpuTLB
params() constClockedObjectinline
Params typedefX86ISA::GpuTLB
preDumpStats()Stats::Groupvirtual
printAccessPattern()X86ISA::GpuTLB
prvEvalTickClockedObjectprotected
pwrState() constClockedObjectinline
pwrState(Enums::PwrState)ClockedObject
pwrStateName() constClockedObjectinline
pwrStateWeights() constClockedObject
regProbeListeners()SimObjectvirtual
regProbePoints()SimObjectvirtual
regStats() overrideX86ISA::GpuTLBvirtual
reschedule(Event &event, Tick when, bool always=false)EventManagerinline
reschedule(Event *event, Tick when, bool always=false)EventManagerinline
resetClock() constClockedinlineprotected
resetStats()Stats::Groupvirtual
schedule(Event &event, Tick when)EventManagerinline
schedule(Event *event, Tick when)EventManagerinline
Serializable()Serializable
serialize(CheckpointOut &cp) const overrideX86ISA::GpuTLBvirtual
serializeAll(CheckpointOut &cp)SimObjectstatic
Serializable::serializeAll(const std::string &cpt_dir)Serializablestatic
serializeSection(CheckpointOut &cp, const char *name) constSerializable
serializeSection(CheckpointOut &cp, const std::string &name) constSerializableinline
setConfigAddress(uint32_t addr)X86ISA::GpuTLB
setCurTick(Tick newVal)EventManagerinline
setMaskX86ISA::GpuTLBprotected
signalDrainDone() constDrainableinlineprotected
SimObject(const Params *_params)SimObject
sizeX86ISA::GpuTLBprotected
startup()SimObjectvirtual
statsClockedObjectprotected
ticks(int numCycles) constX86ISA::GpuTLBinline
ticksToCycles(Tick t) constClockedinline
tickToCycles(Tick val) constX86ISA::GpuTLBinline
tlbX86ISA::GpuTLBprotected
TLB_HIT enum valueX86ISA::GpuTLB
TLB_MISS enum valueX86ISA::GpuTLB
TLBFootprintX86ISA::GpuTLB
tlbLookup(const RequestPtr &req, ThreadContext *tc, bool update_stats)X86ISA::GpuTLB
tlbOutcome enum nameX86ISA::GpuTLB
translate(const RequestPtr &req, ThreadContext *tc, Translation *translation, Mode mode, bool &delayedResponse, bool timing, int &latency)X86ISA::GpuTLBprotected
translateAtomic(const RequestPtr &req, ThreadContext *tc, Mode mode, int &latency)X86ISA::GpuTLB
translateInt(const RequestPtr &req, ThreadContext *tc)X86ISA::GpuTLBprotected
translateTiming(const RequestPtr &req, ThreadContext *tc, Translation *translation, Mode mode, int &latency)X86ISA::GpuTLB
translationReturn(Addr virtPageAddr, tlbOutcome outcome, PacketPtr pkt)X86ISA::GpuTLB
translationReturnEventX86ISA::GpuTLB
unserialize(CheckpointIn &cp) overrideX86ISA::GpuTLBvirtual
unserializeGlobals(CheckpointIn &cp)Serializablestatic
unserializeSection(CheckpointIn &cp, const char *name)Serializable
unserializeSection(CheckpointIn &cp, const std::string &name)Serializableinline
updateClockPeriod()Clockedinline
updatePageFootprint(Addr virt_page_addr)X86ISA::GpuTLB
updatePhysAddresses(Addr virt_page_addr, TlbEntry *tlb_entry, Addr phys_page_addr)X86ISA::GpuTLB
voltage() constClockedinline
wakeupEventQueue(Tick when=(Tick) -1)EventManagerinline
Walker classX86ISA::GpuTLBfriend
walkerX86ISA::GpuTLBprotected
~Clocked()Clockedinlineprotectedvirtual
~Drainable()Drainableprotectedvirtual
~GpuTLB()X86ISA::GpuTLB
~Group()Stats::Groupvirtual
~Serializable()Serializablevirtual
~SimObject()SimObjectvirtual
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