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gem5
v19.0.0.0
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#include "arch/generic/vec_pred_reg.hh"#include "arch/generic/vec_reg.hh"#include "arch/sparc/generated/max_inst_regs.hh"#include "arch/sparc/miscregs.hh"#include "arch/sparc/sparc_traits.hh"#include "base/types.hh"Go to the source code of this file.
Namespaces | |
| SparcISA | |
Typedefs | |
| using | SparcISA::VecElem = ::DummyVecElem |
| using | SparcISA::VecReg = ::DummyVecReg |
| using | SparcISA::ConstVecReg = ::DummyConstVecReg |
| using | SparcISA::VecRegContainer = ::DummyVecRegContainer |
| using | SparcISA::VecPredReg = ::DummyVecPredReg |
| using | SparcISA::ConstVecPredReg = ::DummyConstVecPredReg |
| using | SparcISA::VecPredRegContainer = ::DummyVecPredRegContainer |
Variables | |
| constexpr unsigned | SparcISA::NumVecElemPerVecReg = ::DummyNumVecElemPerVecReg |
| constexpr size_t | SparcISA::VecRegSizeBytes = ::DummyVecRegSizeBytes |
| constexpr size_t | SparcISA::VecPredRegSizeBits = ::DummyVecPredRegSizeBits |
| constexpr bool | SparcISA::VecPredRegHasPackedRepr = ::DummyVecPredRegHasPackedRepr |
| const int | SparcISA::ZeroReg = 0 |
| const int | SparcISA::ReturnAddressReg = 31 |
| const int | SparcISA::ReturnValueReg = 8 |
| const int | SparcISA::StackPointerReg = 14 |
| const int | SparcISA::FramePointerReg = 30 |
| const int | SparcISA::SyscallPseudoReturnReg = 9 |
| const int | SparcISA::NumIntArchRegs = 32 |
| const int | SparcISA::NumIntRegs = (MaxGL + 1) * 8 + NWindows * 16 + NumMicroIntRegs |
| const int | SparcISA::NumVecRegs = 1 |
| const int | SparcISA::NumVecPredRegs = 1 |
| const int | SparcISA::NumCCRegs = 0 |
| const int | SparcISA::TotalNumRegs = NumIntRegs + NumFloatRegs + NumMiscRegs |