|
gem5
v20.1.0.5
|
Go to the source code of this file.
Classes | |
| class | BaseGic |
| class | BaseGicRegisters |
| class | ArmInterruptPinGen |
| This SimObject is instantiated in the python world and serves as an ArmInterruptPin generator. More... | |
| class | ArmSPIGen |
| Shared Peripheral Interrupt Generator It is capable of generating one interrupt only: it maintains a pointer to it and returns it every time it is asked for it (via the get metod) More... | |
| class | ArmPPIGen |
| Private Peripheral Interrupt Generator Since PPIs are banked in the GIC, this class is capable of generating more than one interrupt (one per ContextID). More... | |
| class | ArmInterruptPin |
| Generic representation of an Arm interrupt pin. More... | |
| class | ArmSPI |
| class | ArmPPI |
Base class for ARM GIC implementations
Definition in file base_gic.hh.