gem5  v20.1.0.5
Public Member Functions | Private Attributes | Friends | List of all members
ArmISA::WatchPoint Class Reference

#include <self_debug.hh>

Public Member Functions

 WatchPoint (MiscRegIndex ctrl_index, MiscRegIndex val_index, SelfDebug *_conf, bool lva, bool aarch32)
 
bool compareAddress (ThreadContext *tc, Addr in_addr, uint8_t bas, uint8_t mask, unsigned size)
 
Addr getAddrfromReg (ThreadContext *tc)
 
bool isDoubleAligned (Addr addr)
 
void updateControl (DBGWCR val)
 
bool isEnabled (ThreadContext *tc, ExceptionLevel el, bool hmc, uint8_t ssc, uint8_t pac)
 
bool test (ThreadContext *tc, Addr addr, ExceptionLevel el, bool &wrt, bool atomic, unsigned size)
 

Private Attributes

MiscRegIndex ctrlRegIndex
 
MiscRegIndex valRegIndex
 
SelfDebug * conf
 
bool enable
 
int maxAddrSize
 

Friends

class SelfDebug
 

Detailed Description

Definition at line 143 of file self_debug.hh.

Constructor & Destructor Documentation

◆ WatchPoint()

ArmISA::WatchPoint::WatchPoint ( MiscRegIndex  ctrl_index,
MiscRegIndex  val_index,
SelfDebug *  _conf,
bool  lva,
bool  aarch32 
)
inline

Definition at line 155 of file self_debug.hh.

References maxAddrSize.

Member Function Documentation

◆ compareAddress()

bool WatchPoint::compareAddress ( ThreadContext *  tc,
Addr  in_addr,
uint8_t  bas,
uint8_t  mask,
unsigned  size 
)

Definition at line 601 of file self_debug.cc.

References addr, ArmISA::bas, bits(), ArmISA::i, ArmISA::j, ArmISA::mask, and ArmISA::v.

◆ getAddrfromReg()

Addr ArmISA::WatchPoint::getAddrfromReg ( ThreadContext *  tc)
inline

Definition at line 168 of file self_debug.hh.

References bits(), maxAddrSize, ThreadContext::readMiscReg(), and valRegIndex.

◆ isDoubleAligned()

bool ArmISA::WatchPoint::isDoubleAligned ( Addr  addr)
inline

Definition at line 174 of file self_debug.hh.

References addr.

◆ isEnabled()

bool WatchPoint::isEnabled ( ThreadContext *  tc,
ExceptionLevel  el,
bool  hmc,
uint8_t  ssc,
uint8_t  pac 
)

Definition at line 535 of file self_debug.cc.

References ArmISA::el, ArmISA::EL0, ArmISA::EL1, ArmISA::EL2, ArmISA::EL3, ArmSystem::haveEL(), ArmISA::hmc, ArmISA::pac, panic, ArmISA::SelfDebug::securityStateMatch(), ArmISA::ssc, and ArmISA::v.

◆ test()

bool WatchPoint::test ( ThreadContext *  tc,
Addr  addr,
ExceptionLevel  el,
bool &  wrt,
bool  atomic,
unsigned  size 
)

Definition at line 581 of file self_debug.cc.

References addr, ArmISA::atomic, ArmISA::el, ThreadContext::readMiscReg(), and ArmISA::v.

◆ updateControl()

void ArmISA::WatchPoint::updateControl ( DBGWCR  val)
inline

Definition at line 180 of file self_debug.hh.

References enable, and X86ISA::val.

Referenced by ArmISA::SelfDebug::init().

Friends And Related Function Documentation

◆ SelfDebug

friend class SelfDebug
friend

Definition at line 153 of file self_debug.hh.

Member Data Documentation

◆ conf

SelfDebug* ArmISA::WatchPoint::conf
private

Definition at line 148 of file self_debug.hh.

◆ ctrlRegIndex

MiscRegIndex ArmISA::WatchPoint::ctrlRegIndex
private

Definition at line 146 of file self_debug.hh.

◆ enable

bool ArmISA::WatchPoint::enable
private

Definition at line 149 of file self_debug.hh.

Referenced by updateControl().

◆ maxAddrSize

int ArmISA::WatchPoint::maxAddrSize
private

Definition at line 150 of file self_debug.hh.

Referenced by getAddrfromReg(), and WatchPoint().

◆ valRegIndex

MiscRegIndex ArmISA::WatchPoint::valRegIndex
private

Definition at line 147 of file self_debug.hh.

Referenced by getAddrfromReg().

The documentation for this class was generated from the following files:
Generated on Thu Mar 18 2021 12:09:37 for gem5 by doxygen 1.8.17
51c9cec4c0de576544e991baa9520ebb330c9ef2d8ff66e6b16017b9">FaultSourceInvalid = 0xff
}  Generic fault source enums used to index into {short/long/aarch64}DescFaultSources[] to get the actual encodings based on the current register width state and the translation table format in use. More...
  enum  AnnotationIDs {
  S1PTW, OVA, SAS, SSE,
  SRT, CM, OFA, SF,
  AR
}   enum  TranMethod { LpaeTran, VmsaTran, UnknownTran }   enum  DebugType {
  NODEBUG = 0, BRKPOINT, VECTORCATCH, WPOINT_CM,
  WPOINT_NOCM
}   - Static Public Attributes inherited from ArmISA::ArmFault static uint8_t shortDescFaultSources [NumFaultSources]  Encodings of the fault sources when the short-desc. More...
  static uint8_t longDescFaultSources [NumFaultSources]  Encodings of the fault sources when the long-desc. More...
  static uint8_t aarch64FaultSources [NumFaultSources]  Encodings of the fault sources in AArch64 state. More...
  - Protected Member Functions inherited from ArmISA::ArmFaultVals< Watchpoint > ArmFault::FaultVals vals ("Reset", 0x000, 0x000, 0x000, 0x000, 0x000, MODE_SVC, 0, 0, 0, 0, false, true, true, EC_UNKNOWN)   ArmFault::FaultVals vals ("Undefined Instruction", 0x004, 0x000, 0x200, 0x400, 0x600, MODE_UNDEFINED, 4, 2, 0, 0, true, false, false, EC_UNKNOWN)   ArmFault::FaultVals vals ("Supervisor Call", 0x008, 0x000, 0x200, 0x400, 0x600, MODE_SVC, 4, 2, 4, 2, true, false, false, EC_SVC_TO_HYP)   ArmFault::FaultVals vals ("Secure Monitor Call", 0x008, 0x000, 0x200, 0x400, 0x600, MODE_MON, 4, 4, 4, 4, false, true, true, EC_SMC_TO_HYP)   ArmFault::FaultVals vals ("Hypervisor Call", 0x008, 0x000, 0x200, 0x400, 0x600, MODE_HYP, 4, 4, 4, 4, true, false, false, EC_HVC)   ArmFault::FaultVals vals ("Prefetch Abort", 0x00C, 0x000, 0x200, 0x400, 0x600, MODE_ABORT, 4, 4, 0, 0, true, true, false, EC_PREFETCH_ABORT_TO_HYP)   ArmFault::FaultVals vals ("Data Abort", 0x010, 0x000, 0x200, 0x400, 0x600, MODE_ABORT, 8, 8, 0, 0, true, true, false, EC_DATA_ABORT_TO_HYP)   ArmFault::FaultVals vals ("Virtual Data Abort", 0x010, 0x000, 0x200, 0x400, 0x600, MODE_ABORT, 8, 8, 0, 0, true, true, false, EC_INVALID)   ArmFault::FaultVals vals ("Hypervisor Trap", 0x014, 0x000, 0x200, 0x400, 0x600, MODE_HYP, 0, 0, 0, 0, false, false, false, EC_UNKNOWN)   ArmFault::FaultVals vals ("Secure Monitor Trap", 0x004, 0x000, 0x200, 0x400, 0x600, MODE_MON, 4, 2, 0, 0, false, false, false, EC_UNKNOWN)   ArmFault::FaultVals vals ("IRQ", 0x018, 0x080, 0x280, 0x480, 0x680, MODE_IRQ, 4, 4, 0, 0, false, true, false, EC_UNKNOWN)   ArmFault::FaultVals vals ("Virtual IRQ", 0x018, 0x080, 0x280, 0x480, 0x680, MODE_IRQ, 4, 4, 0, 0, false, true, false, EC_INVALID)   ArmFault::FaultVals vals ("FIQ", 0x01C, 0x100, 0x300, 0x500, 0x700, MODE_FIQ, 4, 4, 0, 0, false, true, true, EC_UNKNOWN)   ArmFault::FaultVals vals ("Virtual FIQ", 0x01C, 0x100, 0x300, 0x500, 0x700, MODE_FIQ, 4, 4, 0, 0, false, true, true, EC_INVALID)   ArmFault::FaultVals vals ("Illegal Inst Set State Fault", 0x004, 0x000, 0x200, 0x400, 0x600, MODE_UNDEFINED, 4, 2, 0, 0, true, false, false, EC_ILLEGAL_INST)   ArmFault::FaultVals vals ("Supervisor Trap", 0x014, 0x000, 0x200, 0x400, 0x600, MODE_SVC, 0, 0, 0, 0, false, false, false, EC_UNKNOWN)   ArmFault::FaultVals vals ("PC Alignment Fault", 0x000, 0x000, 0x200, 0x400, 0x600, MODE_SVC, 0, 0, 0, 0, true, false, false, EC_PC_ALIGNMENT)   ArmFault::FaultVals vals ("SP Alignment Fault", 0x000, 0x000, 0x200, 0x400, 0x600, MODE_SVC, 0, 0, 0, 0, true, false, false, EC_STACK_PTR_ALIGNMENT)   ArmFault::FaultVals vals ("SError", 0x000, 0x180, 0x380, 0x580, 0x780, MODE_SVC, 0, 0, 0, 0, false, true, true, EC_SERROR)   ArmFault::FaultVals vals ("Software Breakpoint", 0x000, 0x000, 0x200, 0x400, 0x600, MODE_SVC, 0, 0, 0, 0, true, false, false, EC_SOFTWARE_BREAKPOINT)   ArmFault::FaultVals vals ("Hardware Breakpoint", 0x000, 0x000, 0x200, 0x400, 0x600, MODE_SVC, 0, 0, 0, 0, true, false, false, EC_HW_BREAKPOINT)   ArmFault::FaultVals vals ("Watchpoint", 0x000, 0x000, 0x200, 0x400, 0x600, MODE_SVC, 0, 0, 0, 0, true, false, false, EC_WATCHPOINT)   ArmFault::FaultVals vals ("SoftwareStep", 0x000, 0x000, 0x200, 0x400, 0x600, MODE_SVC, 0, 0, 0, 0, true, false, false, EC_SOFTWARE_STEP)   ArmFault::FaultVals vals ("ArmSev Flush", 0x000, 0x000, 0x000, 0x000, 0x000, MODE_SVC, 0, 0, 0, 0, false, true, true, EC_UNKNOWN)   ArmFault::FaultVals vals   ArmFault::FaultVals vals   ArmFault::FaultVals vals   ArmFault::FaultVals vals   ArmFault::FaultVals vals   ArmFault::FaultVals vals   ArmFault::FaultVals vals   ArmFault::FaultVals vals   ArmFault::FaultVals vals   ArmFault::FaultVals vals   ArmFault::FaultVals vals   ArmFault::FaultVals vals   ArmFault::FaultVals vals   ArmFault::FaultVals vals   ArmFault::FaultVals vals   ArmFault::FaultVals vals   ArmFault::FaultVals vals   ArmFault::FaultVals vals   ArmFault::FaultVals vals   ArmFault::FaultVals vals   ArmFault::FaultVals vals   ArmFault::FaultVals vals   ArmFault::FaultVals vals   ArmFault::FaultVals vals   - Protected Member Functions inherited from ArmISA::ArmFault virtual Addr getVector (ThreadContext *tc)   Addr getVector64 (ThreadContext *tc)   - Protected Attributes inherited from ArmISA::ArmFault ExtMachInst machInst   uint32_t issRaw   bool bStep   bool from64   bool to64   ExceptionLevel fromEL   ExceptionLevel toEL   OperatingMode fromMode   OperatingMode toMode   bool faultUpdated   bool hypRouted   bool span   - Static Protected Attributes inherited from ArmISA::ArmFaultVals< Watchpoint > static FaultVals vals  

Detailed Description

Definition at line 638 of file faults.hh.

Constructor & Destructor Documentation

◆ Watchpoint()

ArmISA::Watchpoint::Watchpoint ( ExtMachInst  _mach_inst,
Addr  _vaddr,
bool  _write,
bool  _cm 
)

Definition at line 1667 of file faults.cc.

Member Function Documentation

◆ annotate()

void ArmISA::Watchpoint::annotate ( AnnotationIDs  id,
uint64_t  val 
)
overridevirtual

Reimplemented from ArmISA::ArmFault.

Definition at line 1707 of file faults.cc.

References ArmISA::ArmFault::annotate(), ArmISA::ArmFault::OFA, vAddr, and X86ISA::val.

◆ ec()

ExceptionClass ArmISA::Watchpoint::ec ( ThreadContext *  tc) const
overridevirtual

Implements ArmISA::ArmFault.

Definition at line 1722 of file faults.cc.

References ArmISA::EC_WATCHPOINT_CURR_EL, ArmISA::EC_WATCHPOINT_LOWER_EL, ArmISA::ArmFault::fromEL, and ArmISA::ArmFault::toEL.

◆ invoke()

void ArmISA::Watchpoint::invoke ( ThreadContext *  tc,
const StaticInstPtr &  inst = StaticInst::nullStaticInstPtr 
)
overridevirtual

Reimplemented from ArmISA::ArmFault.

Definition at line 1688 of file faults.cc.

References ArmISA::ArmFault::getFaultAddrReg64(), ArmISA::ArmFault::invoke(), ThreadContext::setMiscReg(), and vAddr.

◆ iss()

uint32_t ArmISA::Watchpoint::iss ( ) const
overridevirtual

Implements ArmISA::ArmFault.

Definition at line 1674 of file faults.cc.

References cm, and write.

◆ routeToHyp()

bool ArmISA::Watchpoint::routeToHyp ( ThreadContext *  tc) const
overridevirtual

Reimplemented from ArmISA::ArmFault.

Definition at line 1697 of file faults.cc.

References ArmISA::EL1, ArmISA::EL2, ArmISA::EL2Enabled(), ArmISA::ArmFault::fromEL, ArmISA::MISCREG_HCR_EL2, ArmISA::MISCREG_MDCR_EL2, and ThreadContext::readMiscRegNoEffect().

Member Data Documentation

◆ cm

bool ArmISA::Watchpoint::cm
private

Definition at line 643 of file faults.hh.

Referenced by iss().

◆ vAddr

Addr ArmISA::Watchpoint::vAddr
private

Definition at line 641 of file faults.hh.

Referenced by annotate(), and invoke().

◆ write

bool ArmISA::Watchpoint::write
private

Definition at line 642 of file faults.hh.

Referenced by iss().

The documentation for this class was generated from the following files:
Generated on Thu Mar 18 2021 12:09:37 for gem5 by doxygen 1.8.17