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gem5
v20.1.0.5
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This is the complete list of members for Checker< Impl >, including all inherited members.
| _cacheLineSize | BaseCPU | protected |
| _cpuId | BaseCPU | protected |
| _dataRequestorId | BaseCPU | protected |
| _instRequestorId | BaseCPU | protected |
| _pid | BaseCPU | protected |
| _socketId | BaseCPU | protected |
| _switchedOut | BaseCPU | protected |
| _taskId | BaseCPU | protected |
| activateContext(ThreadID thread_num) | BaseCPU | virtual |
| addressMonitor | BaseCPU | private |
| advancePC(const Fault &fault) | Checker< Impl > | |
| amoMem(Addr addr, uint8_t *data, unsigned size, Request::Flags flags, AtomicOpFunctorPtr amo_op) override | CheckerCPU | inline |
| ExecContext::amoMem(Addr addr, uint8_t *data, unsigned int size, Request::Flags flags, AtomicOpFunctorPtr amo_op) | ExecContext | inlinevirtual |
| armMonitor(Addr address) override | CheckerCPU | inlinevirtual |
| BaseCPU::armMonitor(ThreadID tid, Addr address) | BaseCPU | |
| BaseCPU(Params *params, bool is_checker=false) | BaseCPU | |
| cacheLineSize() const | BaseCPU | inline |
| changedPC | CheckerCPU | |
| Checker(Params *p) | Checker< Impl > | inline |
| CheckerCPU(Params *p) | CheckerCPU | |
| checkFlags(const RequestPtr &unverified_req, Addr vAddr, Addr pAddr, int flags) | CheckerCPU | |
| checkInterrupts(ThreadID tid) const | BaseCPU | inline |
| clearInterrupt(ThreadID tid, int int_num, int index) | BaseCPU | inline |
| clearInterrupts(ThreadID tid) | BaseCPU | inline |
| contextToThread(ContextID cid) | BaseCPU | inline |
| copyResult(const DynInstPtr &inst, const InstResult &mismatch_val, int start_idx) | Checker< Impl > | |
| CPU_STATE_ON enum value | BaseCPU | protected |
| CPU_STATE_SLEEP enum value | BaseCPU | protected |
| CPU_STATE_WAKEUP enum value | BaseCPU | protected |
| cpuId() const | BaseCPU | inline |
| cpuList | BaseCPU | privatestatic |
| CPUState enum name | BaseCPU | protected |
| curMacroStaticInst | CheckerCPU | protected |
| currentFunctionEnd | BaseCPU | private |
| currentFunctionStart | BaseCPU | private |
| curStaticInst | CheckerCPU | protected |
| dataRequestorId() const | BaseCPU | inline |
| dcachePort | CheckerCPU | protected |
| demapDataPage(Addr vaddr, uint64_t asn) | CheckerCPU | inline |
| demapInstPage(Addr vaddr, uint64_t asn) | CheckerCPU | inline |
| demapPage(Addr vaddr, uint64_t asn) override | CheckerCPU | inlinevirtual |
| deschedulePowerGatingEvent() | BaseCPU | |
| dtb | CheckerCPU | protected |
| dumpAndExit(const DynInstPtr &inst) | Checker< Impl > | private |
| CheckerCPU::dumpAndExit() | CheckerCPU | |
| dumpInsts() | Checker< Impl > | private |
| DynInstPtr typedef | Checker< Impl > | private |
| enableFunctionTrace() | BaseCPU | private |
| enterPwrGating() | BaseCPU | protected |
| enterPwrGatingEvent | BaseCPU | protected |
| exitOnError | CheckerCPU | |
| findContext(ThreadContext *tc) | BaseCPU | |
| flushTLBs() | BaseCPU | |
| functionEntryTick | BaseCPU | private |
| functionTraceStream | BaseCPU | private |
| functionTracingEnabled | BaseCPU | private |
| genMemFragmentRequest(Addr frag_addr, int size, Request::Flags flags, const std::vector< bool > &byte_enable, int &frag_size, int &size_left) const | CheckerCPU | |
| getAddrMonitor() override | CheckerCPU | inlinevirtual |
| getContext(int tn) | BaseCPU | inlinevirtual |
| getCpuAddrMonitor(ThreadID tid) | BaseCPU | inline |
| getCurrentInstCount(ThreadID tid) | BaseCPU | |
| getDataPort() override | CheckerCPU | inlinevirtual |
| getDTBPtr() | CheckerCPU | inline |
| getHtmTransactionalDepth() const override | CheckerCPU | inlinevirtual |
| getHtmTransactionUid() const override | CheckerCPU | inlinevirtual |
| getInstPort() override | CheckerCPU | inlinevirtual |
| getInterruptController(ThreadID tid) | BaseCPU | inline |
| getITBPtr() | CheckerCPU | inline |
| getPid() const | BaseCPU | inline |
| getPort(const std::string &if_name, PortID idx=InvalidPortID) override | BaseCPU | |
| getSendFunctional() | BaseCPU | inlinevirtual |
| getTracer() | BaseCPU | inline |
| getWritableVecPredRegOperand(const StaticInst *si, int idx) override | CheckerCPU | inlinevirtual |
| getWritableVecRegOperand(const StaticInst *si, int idx) override | CheckerCPU | inlinevirtual |
| haltContext(ThreadID thread_num) | BaseCPU | virtual |
| handleError(const DynInstPtr &inst) | Checker< Impl > | inlineprivate |
| CheckerCPU::handleError() | CheckerCPU | inline |
| handlePendingInt() | Checker< Impl > | |
| icachePort | CheckerCPU | protected |
| inHtmTransactionalState() const override | CheckerCPU | inlinevirtual |
| init() override | CheckerCPU | |
| initiateHtmCmd(Request::Flags flags) override | CheckerCPU | inlinevirtual |
| initiateMemAMO(Addr addr, unsigned int size, Request::Flags flags, AtomicOpFunctorPtr amo_op) | ExecContext | inlinevirtual |
| initiateMemRead(Addr addr, unsigned int size, Request::Flags flags, const std::vector< bool > &byte_enable=std::vector< bool >()) | ExecContext | inlinevirtual |
| instAddr() | CheckerCPU | inline |
| instCnt | BaseCPU | protected |
| instCount() | BaseCPU | inline |
| instList | Checker< Impl > | private |
| InstListIt typedef | Checker< Impl > | private |
| instRequestorId() const | BaseCPU | inline |
| interrupts | BaseCPU | protected |
| invldPid | BaseCPU | static |
| itb | CheckerCPU | protected |
| MachInst typedef | CheckerCPU | protected |
| microPC() | CheckerCPU | inline |
| miscRegIdxs | CheckerCPU | protected |
| mwait(PacketPtr pkt) override | CheckerCPU | inlinevirtual |
| BaseCPU::mwait(ThreadID tid, PacketPtr pkt) | BaseCPU | |
| mwaitAtomic(ThreadContext *tc) override | CheckerCPU | inlinevirtual |
| BaseCPU::mwaitAtomic(ThreadID tid, ThreadContext *tc, BaseTLB *dtb) | BaseCPU | |
| newHtmTransactionUid() const override | CheckerCPU | inlinevirtual |
| newPCState | CheckerCPU | |
| nextInstAddr() | CheckerCPU | inline |
| numContexts() | BaseCPU | inline |
| numCycles | BaseCPU | |
| numInst | CheckerCPU | protected |
| numLoad | CheckerCPU | |
| numSimulatedCPUs() | BaseCPU | inlinestatic |
| numSimulatedInsts() | BaseCPU | inlinestatic |
| numSimulatedInsts() | BaseCPU | inlinestatic |
| numSimulatedOps() | BaseCPU | inlinestatic |
| numSimulatedOps() | BaseCPU | inlinestatic |
| numThreads | BaseCPU | |
| numWorkItemsCompleted | BaseCPU | |
| numWorkItemsStarted | BaseCPU | |
| Params typedef | CheckerCPU | |
| params() const | BaseCPU | inline |
| PCMask | BaseCPU | static |
| PCState typedef | ExecContext | |
| pcState() const override | CheckerCPU | inlinevirtual |
| pcState(const TheISA::PCState &val) override | CheckerCPU | inlinevirtual |
| pmuProbePoint(const char *name) | BaseCPU | protected |
| postInterrupt(ThreadID tid, int int_num, int index) | BaseCPU | |
| powerGatingOnIdle | BaseCPU | protected |
| ppActiveCycles | BaseCPU | protected |
| ppAllCycles | BaseCPU | protected |
| ppRetiredBranches | BaseCPU | protected |
| ppRetiredInsts | BaseCPU | protected |
| ppRetiredInstsPC | BaseCPU | protected |
| ppRetiredLoads | BaseCPU | protected |
| ppRetiredStores | BaseCPU | protected |
| ppSleeping | BaseCPU | protected |
| previousCycle | BaseCPU | protected |
| previousState | BaseCPU | protected |
| probeInstCommit(const StaticInstPtr &inst, Addr pc) | BaseCPU | virtual |
| pwrGatingLatency | BaseCPU | protected |
| readCCRegOperand(const StaticInst *si, int idx) override | CheckerCPU | inlinevirtual |
| readFloatRegOperandBits(const StaticInst *si, int idx) override | CheckerCPU | inlinevirtual |
| readIntRegOperand(const StaticInst *si, int idx) override | CheckerCPU | inlinevirtual |
| readMem(Addr addr, uint8_t *data, unsigned size, Request::Flags flags, const std::vector< bool > &byte_enable=std::vector< bool >()) override | CheckerCPU | |
| ExecContext::readMem(Addr addr, uint8_t *data, unsigned int size, Request::Flags flags, const std::vector< bool > &byte_enable=std::vector< bool >()) | ExecContext | inlinevirtual |
| readMemAccPredicate() const override | CheckerCPU | inlinevirtual |
| readMiscReg(int misc_reg) override | CheckerCPU | inlinevirtual |
| readMiscRegNoEffect(int misc_reg) const | CheckerCPU | inline |
| readMiscRegOperand(const StaticInst *si, int idx) override | CheckerCPU | inlinevirtual |
| readPredicate() const override | CheckerCPU | inlinevirtual |
| readStCondFailures() const override | CheckerCPU | inlinevirtual |
| readVec16BitLaneOperand(const StaticInst *si, int idx) const override | CheckerCPU | inlinevirtual |
| readVec32BitLaneOperand(const StaticInst *si, int idx) const override | CheckerCPU | inlinevirtual |
| readVec64BitLaneOperand(const StaticInst *si, int idx) const override | CheckerCPU | inlinevirtual |
| readVec8BitLaneOperand(const StaticInst *si, int idx) const override | CheckerCPU | inlinevirtual |
| readVecElemOperand(const StaticInst *si, int idx) const override | CheckerCPU | inlinevirtual |
| readVecPredRegOperand(const StaticInst *si, int idx) const override | CheckerCPU | inlinevirtual |
| readVecRegOperand(const StaticInst *si, int idx) const override | CheckerCPU | inlinevirtual |
| recordPCChange(const TheISA::PCState &val) | CheckerCPU | inline |
| registerThreadContexts() | BaseCPU | |
| regProbePoints() override | BaseCPU | |
| regStats() override | BaseCPU | |
| requestorId | CheckerCPU | protected |
| result | CheckerCPU | protected |
| scheduleInstStop(ThreadID tid, Counter insts, const char *cause) | BaseCPU | |
| schedulePowerGatingEvent() | BaseCPU | |
| serialize(CheckpointOut &cp) const override | CheckerCPU | |
| serializeThread(CheckpointOut &cp, ThreadID tid) const | BaseCPU | inlinevirtual |
| setCCRegOperand(const StaticInst *si, int idx, RegVal val) override | CheckerCPU | inlinevirtual |
| setDcachePort(RequestPort *dcache_port) | CheckerCPU | |
| setFloatRegOperandBits(const StaticInst *si, int idx, RegVal val) override | CheckerCPU | inlinevirtual |
| setIcachePort(RequestPort *icache_port) | CheckerCPU | |
| setIntRegOperand(const StaticInst *si, int idx, RegVal val) override | CheckerCPU | inlinevirtual |
| setMemAccPredicate(bool val) override | CheckerCPU | inlinevirtual |
| setMiscReg(int misc_reg, RegVal val) override | CheckerCPU | inlinevirtual |
| setMiscRegNoEffect(int misc_reg, RegVal val) | CheckerCPU | inline |
| setMiscRegOperand(const StaticInst *si, int idx, RegVal val) override | CheckerCPU | inlinevirtual |
| setPid(uint32_t pid) | BaseCPU | inline |
| setPredicate(bool val) override | CheckerCPU | inlinevirtual |
| setScalarResult(T &&t) | CheckerCPU | inline |
| setStCondFailures(unsigned int sc_failures) override | CheckerCPU | inlinevirtual |
| setSystem(System *system) | CheckerCPU | |
| setVecElemOperand(const StaticInst *si, int idx, const VecElem val) override | CheckerCPU | inlinevirtual |
| setVecElemResult(T &&t) | CheckerCPU | inline |
| setVecLaneOperand(const StaticInst *si, int idx, const LaneData< LaneSize::Byte > &val) override | CheckerCPU | inlinevirtual |
| setVecLaneOperand(const StaticInst *si, int idx, const LaneData< LaneSize::TwoByte > &val) override | CheckerCPU | inlinevirtual |
| setVecLaneOperand(const StaticInst *si, int idx, const LaneData< LaneSize::FourByte > &val) override | CheckerCPU | inlinevirtual |
| setVecLaneOperand(const StaticInst *si, int idx, const LaneData< LaneSize::EightByte > &val) override | CheckerCPU | inlinevirtual |
| setVecLaneOperandT(const StaticInst *si, int idx, const LD &val) | CheckerCPU | inline |
| setVecPredRegOperand(const StaticInst *si, int idx, const VecPredRegContainer &val) override | CheckerCPU | inlinevirtual |
| setVecPredResult(T &&t) | CheckerCPU | inline |
| setVecRegOperand(const StaticInst *si, int idx, const VecRegContainer &val) override | CheckerCPU | inlinevirtual |
| setVecResult(T &&t) | CheckerCPU | inline |
| socketId() const | BaseCPU | inline |
| startNumInst | CheckerCPU | protected |
| startNumLoad | CheckerCPU | |
| startup() override | BaseCPU | |
| suspendContext(ThreadID thread_num) | BaseCPU | virtual |
| switchedOut() const | BaseCPU | inline |
| switchOut() | Checker< Impl > | virtual |
| syscall() override | CheckerCPU | inlinevirtual |
| syscallRetryLatency | BaseCPU | |
| system | BaseCPU | |
| systemPtr | CheckerCPU | protected |
| takeOverFrom(BaseCPU *oldCPU) | Checker< Impl > | virtual |
| taskId() const | BaseCPU | inline |
| taskId(uint32_t id) | BaseCPU | inline |
| tc | CheckerCPU | protected |
| tcBase() const override | CheckerCPU | inlinevirtual |
| thread | CheckerCPU | |
| threadBase() | CheckerCPU | inline |
| threadContexts | BaseCPU | protected |
| totalInsts() const override | CheckerCPU | inlinevirtual |
| totalOps() const override | CheckerCPU | inlinevirtual |
| traceFunctions(Addr pc) | BaseCPU | inline |
| traceFunctionsInternal(Addr pc) | BaseCPU | private |
| tracer | BaseCPU | protected |
| unserialize(CheckpointIn &cp) override | CheckerCPU | |
| unserializeThread(CheckpointIn &cp, ThreadID tid) | BaseCPU | inlinevirtual |
| unverifiedInst | Checker< Impl > | private |
| unverifiedMemData | CheckerCPU | |
| unverifiedReq | CheckerCPU | |
| unverifiedResult | CheckerCPU | |
| updateCycleCounters(CPUState state) | BaseCPU | inlineprotected |
| updateOnError | CheckerCPU | |
| updateThisCycle | Checker< Impl > | private |
| validateExecution(const DynInstPtr &inst) | Checker< Impl > | |
| validateInst(const DynInstPtr &inst) | Checker< Impl > | |
| validateState() | Checker< Impl > | |
| VecElem typedef | ExecContext | |
| VecPredRegContainer typedef | ExecContext | |
| VecRegContainer typedef | CheckerCPU | protected |
| verify(const DynInstPtr &inst) | Checker< Impl > | |
| verifyMemoryMode() const | BaseCPU | inlinevirtual |
| waitForRemoteGDB() const | BaseCPU | |
| wakeup(ThreadID tid) override | CheckerCPU | inlinevirtual |
| warnOnlyOnLoadError | CheckerCPU | |
| willChangePC | CheckerCPU | |
| workItemBegin() | BaseCPU | inline |
| workItemEnd() | BaseCPU | inline |
| workload | CheckerCPU | protected |
| writeMem(uint8_t *data, unsigned size, Addr addr, Request::Flags flags, uint64_t *res, const std::vector< bool > &byte_enable=std::vector< bool >()) override | CheckerCPU | |
| ExecContext::writeMem(uint8_t *data, unsigned int size, Addr addr, Request::Flags flags, uint64_t *res, const std::vector< bool > &byte_enable=std::vector< bool >())=0 | ExecContext | pure virtual |
| youngestSN | CheckerCPU | |
| ~BaseCPU() | BaseCPU | virtual |
| ~CheckerCPU() | CheckerCPU | virtual |