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gem5
v20.1.0.5
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#include <vector>#include "arch/arm/interrupts.hh"#include "base/addr_range.hh"#include "base/bitunion.hh"#include "cpu/intr_control.hh"#include "dev/arm/base_gic.hh"#include "dev/io_device.hh"#include "dev/platform.hh"#include "params/GicV2.hh"Go to the source code of this file.
Classes | |
| class | GicV2 |
| struct | GicV2::BankedRegs |
| Registers "banked for each connected processor" per ARM IHI0048B. More... | |
Implementation of a GICv2
Definition in file gic_v2.hh.