gem5  v21.0.1.0
ComputeUnit Member List

This is the complete list of members for ComputeUnit, including all inherited members.

_cacheLineSizeComputeUnitprivate
_drainManagerDrainableprivate
_drainStateDrainablemutableprivate
_numBarrierSlotsComputeUnitprivate
_paramsSimObjectprotected
_requestorIdComputeUnitprotected
activeWavesComputeUnit
addStat(Stats::Info *info)Stats::Group
addStatGroup(const char *name, Group *block)Stats::Group
allAtBarrier(int bar_id)ComputeUnit
barrierSlot(int bar_id)ComputeUnitinlineprivate
cacheLineBitsComputeUnitprivate
cacheLineSize() constComputeUnitinline
clockDomainClockedprivate
Clocked(ClockDomain &clk_domain)Clockedinlineprotected
Clocked(Clocked &)=deleteClockedprotected
clockEdge(Cycles cycles=Cycles(0)) constClockedinline
ClockedObject(const ClockedObjectParams &p)ClockedObject
clockPeriod() constClockedinline
clockPeriodUpdated()Clockedinlineprotectedvirtual
coalescerToVrfBusWidthComputeUnit
ComputeUnit(const Params &p)ComputeUnit
countPagesComputeUnit
cu_idComputeUnit
curCycle() constClockedinline
currentSection()Serializablestatic
cycleClockedmutableprivate
cyclesToTicks(Cycles c) constClockedinline
debugSegFaultComputeUnit
decMaxBarrierCnt(int bar_id)ComputeUnit
deleteFromPipeMap(Wavefront *w)ComputeUnit
deschedule(Event &event)EventManagerinline
deschedule(Event *event)EventManagerinline
dispWorkgroup(HSAQueueEntry *task, int num_wfs_in_wg)ComputeUnit
dmDrain()Drainableprivate
dmDrainResume()Drainableprivate
doFlush(GPUDynInstPtr gpuDynInst)ComputeUnit
doInvalidate(RequestPtr req, int kernId)ComputeUnit
doSmReturn(GPUDynInstPtr gpuDynInst)ComputeUnit
dpBypassLength() constComputeUnitinline
dpBypassPipeLengthComputeUnit
drain() overrideSimObjectinlinevirtual
Drainable()Drainableprotected
drainResume()Drainableinlineprotectedvirtual
drainState() constDrainableinline
EventManager(EventManager &em)EventManagerinline
EventManager(EventManager *em)EventManagerinline
EventManager(EventQueue *eq)EventManagerinline
eventqEventManagerprotected
eventQueue() constEventManagerinline
exec()ComputeUnit
exec_policyComputeUnit
execStageComputeUnit
exitCallback()ComputeUnit
fetch(PacketPtr pkt, Wavefront *wavefront)ComputeUnit
fetchStageComputeUnit
fillKernelState(Wavefront *w, HSAQueueEntry *task)ComputeUnit
find(const char *name)SimObjectstatic
firstMemUnit() constComputeUnit
freeBarrierIdsComputeUnitprivate
frequency() constClockedinline
functionalTLBComputeUnit
getAndIncSeqNum()ComputeUnitinline
getCacheLineBits() constComputeUnitinline
getFreeBarrierId()ComputeUnitinlineprivate
getLds() constComputeUnitinline
getPort(const std::string &if_name, PortID idx) overrideComputeUnitinlinevirtual
getProbeManager()SimObject
getRefCounter(const uint32_t dispatchId, const uint32_t wgId) constComputeUnit
getStatGroups() constStats::Group
getStats() constStats::Group
getTokenManager()ComputeUnitinline
glbMemToVrfBusComputeUnit
globalMemoryPipeComputeUnit
globalSeqNumComputeUnitprivate
gmTokenPortComputeUnit
Group()=deleteStats::Group
Group(const Group &)=deleteStats::Group
Group(Group *parent, const char *name=nullptr)Stats::Group
handleMemPacket(PacketPtr pkt, int memport_index)ComputeUnit
hasDispResources(HSAQueueEntry *task, int &num_wfs_in_wg)ComputeUnit
headTailMapComputeUnitprivate
idleCUTimeoutComputeUnit
idleWfsComputeUnit
incNumAtBarrier(int bar_id)ComputeUnit
init() overrideComputeUnitvirtual
initiateFetch(Wavefront *wavefront)ComputeUnit
initState()SimObjectvirtual
injectGlobalMemFence(GPUDynInstPtr gpuDynInst, bool kernelMemSync, RequestPtr req=nullptr)ComputeUnit
insertInPipeMap(Wavefront *w)ComputeUnit
instExecPerSimdComputeUnit
isDone() constComputeUnit
issuePeriodComputeUnit
isVectorAluIdle(uint32_t simdId) constComputeUnit
lastExecCycleComputeUnit
lastMemUnit() constComputeUnit
lastVaddrCUComputeUnit
lastVaddrSimdComputeUnit
lastVaddrWFComputeUnit
ldsComputeUnitprotected
ldsPortComputeUnit
loadBusLength() constComputeUnitinline
loadState(CheckpointIn &cp)SimObjectvirtual
localMemBarrierComputeUnit
localMemoryPipeComputeUnit
locMemToVrfBusComputeUnit
mapWaveToGlobalMem(Wavefront *w) constComputeUnit
mapWaveToLocalMem(Wavefront *w) constComputeUnit
mapWaveToScalarAlu(Wavefront *w) constComputeUnit
mapWaveToScalarAluGlobalIdx(Wavefront *w) constComputeUnit
mapWaveToScalarMem(Wavefront *w) constComputeUnit
maxBarrierCnt(int bar_id)ComputeUnit
memInvalidate()SimObjectinlinevirtual
memPortComputeUnit
memPortTokensComputeUnit
memWriteback()SimObjectinlinevirtual
mergedParentStats::Groupprivate
mergedStatGroupsStats::Groupprivate
mergeStatGroup(Group *block)Stats::Group
name() constSimObjectinlinevirtual
nextCycle() constClockedinline
notifyFork()Drainableinlinevirtual
numAtBarrier(int bar_id)ComputeUnit
numBarrierSlots() constComputeUnitinline
numCyclesPerLoadTransferComputeUnit
numCyclesPerStoreTransferComputeUnit
numExeUnits() constComputeUnit
numScalarALUsComputeUnit
numScalarMemUnitsComputeUnit
numScalarRegsPerSimdComputeUnit
numVecRegsPerSimdComputeUnit
numVectorALUsComputeUnit
numVectorGlobalMemUnitsComputeUnit
numVectorSharedMemUnitsComputeUnit
numWfsToSchedComputeUnit
numYetToReachBarrier(int bar_id)ComputeUnit
operandNetworkLengthComputeUnit
SimObject::operator=(const Group &)=deleteStats::Group
Clocked::operator=(Clocked &)=deleteClockedprotected
oprNetPipeLength() constComputeUnitinline
pageAccessesComputeUnit
pageDataStruct typedefComputeUnit
pagesTouchedComputeUnit
Params typedefComputeUnit
params() constSimObjectinline
pathSerializableprivatestatic
perLaneTLBComputeUnit
pipeMapComputeUnit
powerStateClockedObject
preDumpStats()Stats::Groupvirtual
prefetchDepthComputeUnit
prefetchStrideComputeUnit
prefetchTypeComputeUnit
probeManagerSimObjectprivate
processFetchReturn(PacketPtr pkt)ComputeUnit
processTimingPacket(PacketPtr pkt)ComputeUnit
registerManagerComputeUnit
regProbeListeners()SimObjectvirtual
regProbePoints()SimObjectvirtual
regStats()Stats::Groupvirtual
releaseBarrier(int bar_id)ComputeUnit
releaseWFsFromBarrier(int bar_id)ComputeUnit
req_tick_latencyComputeUnit
requestorId()ComputeUnitinline
reschedule(Event &event, Tick when, bool always=false)EventManagerinline
reschedule(Event *event, Tick when, bool always=false)EventManagerinline
resetBarrier(int bar_id)ComputeUnit
resetClock() constClockedinlineprotected
resetRegisterPool()ComputeUnit
resetStats()Stats::Groupvirtual
resolveStat(std::string name) constStats::Group
resp_tick_latencyComputeUnit
scalarALUsComputeUnit
scalarDataPortComputeUnit
scalarDTLBPortComputeUnit
scalarMemoryPipeComputeUnit
scalarMemToSrfBusComputeUnit
scalarMemUnitComputeUnit
scalarPipeLength() constComputeUnitinline
scalarPipeStagesComputeUnit
scalarRegsReservedComputeUnit
schedule(Event &event, Tick when)EventManagerinline
schedule(Event *event, Tick when)EventManagerinline
scheduleStageComputeUnit
scheduleToExecuteComputeUnitprivate
scoreboardCheckStageComputeUnit
scoreboardCheckToScheduleComputeUnitprivate
sendRequest(GPUDynInstPtr gpuDynInst, PortID index, PacketPtr pkt)ComputeUnit
sendScalarRequest(GPUDynInstPtr gpuDynInst, PacketPtr pkt)ComputeUnit
sendToLds(GPUDynInstPtr gpuDynInst)ComputeUnit
Serializable()Serializable
serialize(CheckpointOut &cp) const overrideClockedObjectvirtual
serializeAll(CheckpointOut &cp)SimObjectstatic
Serializable::serializeAll(const std::string &cpt_dir)Serializablestatic
serializeSection(CheckpointOut &cp, const char *name) constSerializable
serializeSection(CheckpointOut &cp, const std::string &name) constSerializableinline
setCurTick(Tick newVal)EventManagerinline
shaderComputeUnit
signalDrainDone() constDrainableinlineprotected
simdUnitWidth() constComputeUnitinline
simdWidthComputeUnit
SimObject(const Params &p)SimObject
simObjectListSimObjectprivatestatic
SimObjectList typedefSimObjectprivate
spBypassLength() constComputeUnitinline
spBypassPipeLengthComputeUnit
sqcPortComputeUnit
sqcTLBPortComputeUnit
srfComputeUnit
srf_scm_bus_latencyComputeUnit
srfToScalarMemPipeBusComputeUnit
startup()SimObjectvirtual
startWavefront(Wavefront *w, int waveId, LdsChunk *ldsChunk, HSAQueueEntry *task, int bar_id, bool fetchContext=false)ComputeUnit
statGroupsStats::Groupprivate
statsComputeUnit
storeBusLength() constComputeUnitinline
tickClockedmutableprivate
tickEventComputeUnit
ticksToCycles(Tick t) constClockedinline
tlbPortComputeUnit
unserialize(CheckpointIn &cp) overrideClockedObjectvirtual
unserializeGlobals(CheckpointIn &cp)Serializablestatic
unserializeSection(CheckpointIn &cp, const char *name)Serializable
unserializeSection(CheckpointIn &cp, const std::string &name)Serializableinline
update() constClockedinlineprivate
updateClockPeriod()Clockedinline
updateInstStats(GPUDynInstPtr gpuDynInst)ComputeUnit
updatePageDivergenceDist(Addr addr)ComputeUnit
vectorALUsComputeUnit
vectorGlobalMemUnitComputeUnit
vectorRegsReservedComputeUnit
vectorSharedMemUnitComputeUnit
voltage() constClockedinline
vrfComputeUnit
vrf_gm_bus_latencyComputeUnit
vrf_lm_bus_latencyComputeUnit
vrfToCoalescerBusWidthComputeUnit
vrfToGlobalMemPipeBusComputeUnit
vrfToLocalMemPipeBusComputeUnit
wakeupEventQueue(Tick when=(Tick) -1)EventManagerinline
wavefrontSizeComputeUnitprivate
wfBarrierSlotsComputeUnitprivate
wfListComputeUnit
wfSize() constComputeUnitinline
~Clocked()Clockedinlineprotectedvirtual
~ComputeUnit()ComputeUnit
~Drainable()Drainableprotectedvirtual
~Group()Stats::Groupvirtual
~Serializable()Serializablevirtual
~SimObject()SimObjectvirtual

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