gem5  v21.0.1.0
PowerISA::BranchPCRelCond Member List

This is the complete list of members for PowerISA::BranchPCRelCond, including all inherited members.

_destRegIdxPtrStaticInstprivate
_numCCDestRegsStaticInstprotected
_numDestRegsStaticInstprotected
_numFPDestRegsStaticInstprotected
_numIntDestRegsStaticInstprotected
_numSrcRegsStaticInstprotected
_numVecDestRegsStaticInstprotected
_numVecElemDestRegsStaticInstprotected
_numVecPredDestRegsStaticInstprotected
_opClassStaticInstprotected
_srcRegIdxPtrStaticInstprivate
advancePC(PowerISA::PCState &pcState) const overridePowerISA::PowerStaticInstinlineprotected
StaticInst::advancePC(TheISA::PCState &pcState) const =0StaticInstpure virtual
asBytes(void *buf, size_t max_size) overridePowerISA::PowerStaticInstinlineprotectedvirtual
biPowerISA::BranchCondprotected
boPowerISA::BranchCondprotected
BranchCond(const char *mnem, MachInst _machInst, OpClass __opClass)PowerISA::BranchCondinlineprotected
BranchPCRelCond(const char *mnem, MachInst _machInst, OpClass __opClass)PowerISA::BranchPCRelCondinlineprotected
branchTarget(const PowerISA::PCState &pc) const overridePowerISA::BranchPCRelCondprotected
branchTarget(const TheISA::PCState &pc) constPowerISA::BranchPCRelCondprotected
branchTarget(ThreadContext *tc) constPowerISA::BranchPCRelCondprotected
PowerISA::BranchCond::branchTarget(const TheISA::PCState &pc) constStaticInstvirtual
PowerISA::BranchCond::branchTarget(ThreadContext *tc) constStaticInstvirtual
cachedDisassemblyStaticInstmutableprotected
cachedPCPowerISA::PCDependentDisassemblymutableprotected
cachedSymtabPowerISA::PCDependentDisassemblymutableprotected
completeAcc(Packet *pkt, ExecContext *xc, Trace::InstRecord *traceData) constStaticInstinlinevirtual
condOk(uint32_t cr) constPowerISA::BranchCondinlineprotected
countRefCountedmutableprivate
ctrOk(uint32_t &ctr) constPowerISA::BranchCondinlineprotected
decref() constRefCountedinline
destRegIdx(int i) constStaticInstinline
disassemble(Addr pc, const Loader::SymbolTable *symtab) constPowerISA::PCDependentDisassemblyprotectedvirtual
dispPowerISA::BranchPCRelCondprotected
execute(ExecContext *xc, Trace::InstRecord *traceData) const =0StaticInstpure virtual
fetchMicroop(MicroPC upc) constStaticInstvirtual
flagsStaticInstprotected
generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const overridePowerISA::BranchPCRelCondprotectedvirtual
getEMI() constStaticInstinlinevirtual
getName()StaticInstinline
hasBranchTarget(const TheISA::PCState &pc, ThreadContext *tc, TheISA::PCState &tgt) constStaticInst
incref() constRefCountedinline
initiateAcc(ExecContext *xc, Trace::InstRecord *traceData) constStaticInstinlinevirtual
insertCRField(uint32_t cr, uint32_t bf, uint32_t value) constPowerISA::PowerStaticInstinlineprotected
isAtomic() constStaticInstinline
isCall() constStaticInstinline
isCondCtrl() constStaticInstinline
isControl() constStaticInstinline
isDataPrefetch() constStaticInstinline
isDelayedCommit() constStaticInstinline
isDirectCtrl() constStaticInstinline
isFirstMicroop() constStaticInstinline
isFloating() constStaticInstinline
isFullMemBarrier() constStaticInstinline
isHtmCancel() constStaticInstinline
isHtmCmd() constStaticInstinline
isHtmStart() constStaticInstinline
isHtmStop() constStaticInstinline
isIndirectCtrl() constStaticInstinline
isInstPrefetch() constStaticInstinline
isInteger() constStaticInstinline
isLastMicroop() constStaticInstinline
isLoad() constStaticInstinline
isMacroop() constStaticInstinline
isMemRef() constStaticInstinline
isMicroop() constStaticInstinline
isNonSpeculative() constStaticInstinline
isNop() constStaticInstinline
isPrefetch() constStaticInstinline
isQuiesce() constStaticInstinline
isReadBarrier() constStaticInstinline
isReturn() constStaticInstinline
isSerializeAfter() constStaticInstinline
isSerializeBefore() constStaticInstinline
isSerializing() constStaticInstinline
isSquashAfter() constStaticInstinline
isStore() constStaticInstinline
isStoreConditional() constStaticInstinline
isSyscall() constStaticInstinline
isUncondCtrl() constStaticInstinline
isUnverifiable() constStaticInstinline
isVector() constStaticInstinline
isWriteBarrier() constStaticInstinline
machInstStaticInst
mnemonicStaticInstprotected
nopStaticInstPtrStaticInststatic
nullStaticInstPtrStaticInststatic
numCCDestRegs() constStaticInstinline
numDestRegs() constStaticInstinline
numFPDestRegs() constStaticInstinline
numIntDestRegs() constStaticInstinline
numSrcRegs() constStaticInstinline
numVecDestRegs() constStaticInstinline
numVecElemDestRegs() constStaticInstinline
numVecPredDestRegs() constStaticInstinline
opClass() constStaticInstinline
operator=(const RefCounted &)RefCountedprivate
PCDependentDisassembly(const char *mnem, ExtMachInst _machInst, OpClass __opClass)PowerISA::PCDependentDisassemblyinlineprotected
PowerStaticInst(const char *mnem, MachInst _machInst, OpClass __opClass)PowerISA::PowerStaticInstinlineprotected
printFlags(std::ostream &outs, const std::string &separator) constStaticInst
printReg(std::ostream &os, RegId reg) constPowerISA::PowerStaticInstprotected
RefCounted(const RefCounted &)RefCountedprivate
RefCounted()RefCountedinline
RegIdArrayPtr typedefStaticInst
setDelayedCommit()StaticInstinline
setDestRegIdx(int i, const RegId &val)StaticInstinline
setFirstMicroop()StaticInstinline
setFlag(Flags f)StaticInstinline
setLastMicroop()StaticInstinline
setRegIdxArrays(RegIdArrayPtr src, RegIdArrayPtr dest)StaticInstinlineprotected
setSrcRegIdx(int i, const RegId &val)StaticInstinline
simpleAsBytes(void *buf, size_t max_size, const T &t)StaticInstinlineprotected
srcRegIdx(int i) constStaticInstinline
StaticInst(const char *_mnemonic, TheISA::ExtMachInst _machInst, OpClass __opClass)StaticInstinlineprotected
~RefCounted()RefCountedinlinevirtual
~StaticInst()StaticInstvirtual

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